On Mon, Mar 01, 2021 at 02:15:12PM +0530, kgunda@xxxxxxxxxxxxxx wrote: > On 2021-02-26 22:56, Daniel Thompson wrote: > > On Fri, Feb 26, 2021 at 05:42:24PM +0530, Kiran Gunda wrote: > > > As per the current implementation, after FSC (Full Scale Current) > > > and brightness update the sync bits are transitioned from 1 to 0. > > > > This still seems to incorrectly describe the current behaviour. > > > > Surely in most cases (i.e. every time except the first) the value of the > > sync bit is 0 when the function is called and we get both a 0 to 1 > > and then a 1 to 0 transition. > > > > That is why I recommended set-then-clear terminology to describe the > > current behaviour. It is concise and correct. > > Okay. Actually I have mentioned the "clear-and-set" in explaining the fix. > Let me modify the same terminology in explaining the problem case also. Yes please. In my original review I took time to explain why patch descriptions require care and attention and, also, why expressing the original behaviour as 1 to 0 was inadequate. Based on the previous feedback (and reply) I was rather surprised that the problem was only half corrected in the next revision. Daniel. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
