Drop limit link rate at HBR2 to support link rate upto HBR3. Signed-off-by: Kuogee Hsieh <khsieh@xxxxxxxxxxxxxx> --- drivers/gpu/drm/msm/dp/dp_panel.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c index 9cc8166..63112fa 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -76,10 +76,6 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel) if (link_info->num_lanes > dp_panel->max_dp_lanes) link_info->num_lanes = dp_panel->max_dp_lanes; - /* Limit support upto HBR2 until HBR3 support is added */ - if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4))) - link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4); - DRM_DEBUG_DP("version: %d.%d\n", major, minor); DRM_DEBUG_DP("link_rate=%d\n", link_info->rate); DRM_DEBUG_DP("lane_count=%d\n", link_info->num_lanes); -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel