On Mon, Feb 08, 2021 at 01:55:54PM -0500, Jonathan Marek wrote: > The cleanup patch broke a6xx_gmu_clear_oob, fix it by adding the missing > bitshift operation. > > Fixes: 555c50a4a19b ("drm/msm: Clean up GMU OOB set/clear handling") > Signed-off-by: Jonathan Marek <jonathan@xxxxxxxx> Thanks. I feel silly that I missed that. Reviewed-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx> > --- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > index 71c917f909af..91cf46f84025 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > @@ -339,7 +339,7 @@ void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) > else > bit = a6xx_gmu_oob_bits[state].ack_new; > > - gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, bit); > + gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit); > } > > /* Enable CPU control of SPTP power power collapse */ > -- > 2.26.1 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel