On Fri, Feb 05, 2021 at 10:06:48PM +0200, Ville Syrjälä wrote: > On Fri, Feb 05, 2021 at 12:07:41PM -0800, Navare, Manasi wrote: > > On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote: > > > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote: > > > > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. > > > > Do not read the registers if DPCD rev < 1.4. > > > > > > > > Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868 > > > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- > > > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > > > > index 8c12d5375607..2b83f0f433a2 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > > > @@ -2489,9 +2489,11 @@ static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp) > > > > struct drm_i915_private *i915 = dp_to_i915(intel_dp); > > > > > > > > /* Clear the cached register set to avoid using stale values */ > > > > - > > > > memset(intel_dp->pcon_dsc_dpcd, 0, sizeof(intel_dp->pcon_dsc_dpcd)); > > > > > > > > + if (intel_dp->dpcd[DP_DPCD_REV] < 0x14) > > > > + return; > > > > + > > > > > > Can't check the spec, but makes sense that this stuff is only valid > > > for recent DCPD revisions. > > > > > > Acked-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Yes checked the DP 1.4 spec and this is correct > > I didn't think this is in the DP spec, but rather some special extra > spec which I do not have. Yes I meant just double checked that the DSC support itself from DP 1.4 and hence makes sense that the PCON DSC regs also from >= 1.4 Manasi > > > > > Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > > > > Manasi > > > > > > > > > if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER, > > > > intel_dp->pcon_dsc_dpcd, > > > > sizeof(intel_dp->pcon_dsc_dpcd)) < 0) > > > > -- > > > > 2.29.2 > > > > > > -- > > > Ville Syrjälä > > > Intel > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
