https://bugzilla.kernel.org/show_bug.cgi?id=209713 --- Comment #13 from Frank Kruger (fkrueger@xxxxxxxxxxx) --- The only change regarding "DCN" from 5.10.9 to 5.10.10 is commit 99ea120383b19feb1737c787dc1c8b35ce630fc5 Author: Alex Deucher <alexander.deucher@xxxxxxx> Date: Mon Jan 4 11:24:20 2021 -0500 drm/amdgpu/display: drop DCN support for aarch64 commit c241ed2f0ea549c18cff62a3708b43846b84dae3 upstream. From Ard: "Simply disabling -mgeneral-regs-only left and right is risky, given that the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, and GCC is known to use SIMD registers for spilling, and may invent other uses of the FP/SIMD register file that have nothing to do with the floating point code in question. Note that putting kernel_neon_begin() and kernel_neon_end() around the code that does use FP is not sufficient here, the problem is in all the other code that may be emitted with references to SIMD registers in it. So the only way to do this properly is to put all floating point code in a separate compilation unit, and only compile that unit with -mgeneral-regs-only." Disable support until the code can be properly refactored to support this properly on aarch64. Acked-by: Will Deacon <will@xxxxxxxxxx> Reported-by: Ard Biesheuvel <ardb@xxxxxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> [ardb: backport to v5.10 by reverting c38d444e44badc55 instead] Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> # v5.10 backport Signed-off-by: Ard Biesheuvel <ardb@xxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> Any idea? -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
