On Wed, Jan 13, 2021 at 07:33:37PM +0100, AngeloGioacchino Del Regno wrote: > From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx> > > The upstream API for some reason uses logbase2 instead of > just passing the argument as-is, whereas downstream CAF > kernel does the latter. > > Hence, a mistake has been made when porting: > 4 is the value that's supposed to be passed, but > log2(4) = 2. Changing the value to 16 (= 2^4) fixes > the issue. I like keeping it in human readable values because its easier to visually identify how many registers are saved without doing math. Reviewed-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx> > Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxxx> > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 66980f4cd93e..24ab51bb5a01 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -821,7 +821,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu) > > /* VPC */ > gpu_write(gpu, REG_A5XX_CP_PROTECT(14), ADRENO_PROTECT_RW(0xE68, 8)); > - gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 4)); > + gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 16)); > > /* UCHE */ > gpu_write(gpu, REG_A5XX_CP_PROTECT(16), ADRENO_PROTECT_RW(0xE80, 16)); > -- > 2.29.2 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
