Hello,
the mentioned branch requires the following commit, but it is already applied in 5.10 released kernel,
so I really do not know what next step here.
Mauro
On Tue, Dec 15, 2020 at 11:24 AM kernel test robot <lkp@xxxxxxxxx> wrote:
tree: git://people.freedesktop.org/~agd5f/linux.git amd-20.45
head: a3950d94b046fb206e58fd3ec717f071c0203ba3
commit: e809646e73921328d66a2fbfddf067b9cdb30998 [1953/2427] drm/amd/display: enable SI support in the Kconfig (v2)
config: x86_64-randconfig-a001-20201214 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project a29ecca7819a6ed4250d3689b12b1f664bb790d7)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
git fetch --no-tags radeon-alex amd-20.45
git checkout e809646e73921328d66a2fbfddf067b9cdb30998
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototypes]
int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
^
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
^
static
1 warning generated.
vim +/dce60_get_dp_ref_freq_khz +83 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 82
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 @83 int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 84 {
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 85 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 86 int dprefclk_wdivider;
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 87 int dp_ref_clk_khz;
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 88 int target_div;
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 89
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 90 /* DCE6 has no DPREFCLK_CNTL to read DP Reference Clock source */
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 91
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 92 /* Read the mmDENTIST_DISPCLK_CNTL to get the currently
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 93 * programmed DID DENTIST_DPREFCLK_WDIVIDER*/
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 94 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider);
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 95
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 96 /* Convert DENTIST_DPREFCLK_WDIVIDERto actual divider*/
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 97 target_div = dentist_get_divider_from_did(dprefclk_wdivider);
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 98
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 99 /* Calculate the current DFS clock, in kHz.*/
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 100 dp_ref_clk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 101 * clk_mgr->base.dentist_vco_freq_khz) / target_div;
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 102
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 103 return dce_adjust_dp_ref_freq_for_ss(clk_mgr, dp_ref_clk_khz);
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 104 }
2428ad5c6ece1a6 Mauro Rossi 2020-07-11 105
:::::: The code at line 83 was first introduced by commit
:::::: 2428ad5c6ece1a6861278c01c5e71c8ea258f3d9 drm/amd/display: dc/clk_mgr: add support for SI parts (v2)
:::::: TO: Mauro Rossi <issor.oruam@xxxxxxxxx>
:::::: CC: Yang Xiong <Yang.Xiong@xxxxxxx>
---
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