tree: git://people.freedesktop.org/~agd5f/linux.git amd-20.45
head: 1807abbb3a7f17fc931a15d7fd4365ea148c6bb1
commit: 4978452e875a60112754d1247480cd76321e3ff9 [630/2417] drm/amdkcl: generate config.h
config: i386-randconfig-a003-20201120 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
git fetch --no-tags radeon-alex amd-20.45
git checkout 4978452e875a60112754d1247480cd76321e3ff9
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
All warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:678:2: note: in expansion of macro 'link_regs'
678 | link_regs(0, A),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:678:2: note: in expansion of macro 'link_regs'
678 | link_regs(0, A),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:678:2: note: in expansion of macro 'link_regs'
678 | link_regs(0, A),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[0].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:678:2: note: in expansion of macro 'link_regs'
678 | link_regs(0, A),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:679:2: note: in expansion of macro 'link_regs'
679 | link_regs(1, B),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:679:2: note: in expansion of macro 'link_regs'
679 | link_regs(1, B),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:679:2: note: in expansion of macro 'link_regs'
679 | link_regs(1, B),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[1].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:679:2: note: in expansion of macro 'link_regs'
679 | link_regs(1, B),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:680:2: note: in expansion of macro 'link_regs'
680 | link_regs(2, C),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:680:2: note: in expansion of macro 'link_regs'
680 | link_regs(2, C),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:680:2: note: in expansion of macro 'link_regs'
680 | link_regs(2, C),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[2].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:680:2: note: in expansion of macro 'link_regs'
680 | link_regs(2, C),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:681:2: note: in expansion of macro 'link_regs'
681 | link_regs(3, D),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:681:2: note: in expansion of macro 'link_regs'
681 | link_regs(3, D),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:681:2: note: in expansion of macro 'link_regs'
681 | link_regs(3, D),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[3].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:681:2: note: in expansion of macro 'link_regs'
681 | link_regs(3, D),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:682:2: note: in expansion of macro 'link_regs'
682 | link_regs(4, E),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:682:2: note: in expansion of macro 'link_regs'
682 | link_regs(4, E),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:682:2: note: in expansion of macro 'link_regs'
682 | link_regs(4, E),
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[4].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:682:2: note: in expansion of macro 'link_regs'
682 | link_regs(4, E),
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:683:2: note: in expansion of macro 'link_regs'
683 | link_regs(5, F)
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].TMDS_CTL_BITS')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:203:2: note: in expansion of macro 'SRI'
203 | SRI(TMDS_CTL_BITS, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:236:2: note: in expansion of macro 'DPCS_DCN2_CMN_REG_LIST'
236 | DPCS_DCN2_CMN_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:673:2: note: in expansion of macro 'DPCS_DCN2_REG_LIST'
673 | DPCS_DCN2_REG_LIST(id), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:683:2: note: in expansion of macro 'link_regs'
683 | link_regs(5, F)
| ^~~~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:683:2: note: in expansion of macro 'link_regs'
683 | link_regs(5, F)
| ^~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'link_enc_regs[5].DP_DPHY_INTERNAL_CTRL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:674:2: note: in expansion of macro 'SRI'
674 | SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:683:2: note: in expansion of macro 'link_regs'
683 | link_regs(5, F)
| ^~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:70:
>> drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39976:111: warning: initialized field overwritten [-Woverride-init]
39976 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39976:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
39976 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:183:2: note: in expansion of macro 'LE_SF'
183 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:687:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
687 | LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39976:111: note: (near initialization for 'le_shift.TMDS_CTL0')
39976 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39976:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
39976 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:183:2: note: in expansion of macro 'LE_SF'
183 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:687:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
687 | LINK_ENCODER_MASK_SH_LIST_DCN20(__SHIFT),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39980:111: warning: initialized field overwritten [-Woverride-init]
39980 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39980:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
39980 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:183:2: note: in expansion of macro 'LE_SF'
183 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:692:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
692 | LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39980:111: note: (near initialization for 'le_mask.TMDS_CTL0')
39980 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:39980:111: note: in definition of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
39980 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK 0x00000001L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:183:2: note: in expansion of macro 'LE_SF'
183 | LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:692:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
692 | LINK_ENCODER_MASK_SH_LIST_DCN20(_MASK),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:764:2: note: in expansion of macro 'tf_regs'
764 | tf_regs(0),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[0].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:764:2: note: in expansion of macro 'tf_regs'
764 | tf_regs(0),
| ^~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:765:2: note: in expansion of macro 'tf_regs'
765 | tf_regs(1),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[1].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:765:2: note: in expansion of macro 'tf_regs'
765 | tf_regs(1),
| ^~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:766:2: note: in expansion of macro 'tf_regs'
766 | tf_regs(2),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[2].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:766:2: note: in expansion of macro 'tf_regs'
766 | tf_regs(2),
| ^~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:767:2: note: in expansion of macro 'tf_regs'
767 | tf_regs(3),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[3].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:767:2: note: in expansion of macro 'tf_regs'
767 | tf_regs(3),
| ^~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:768:2: note: in expansion of macro 'tf_regs'
768 | tf_regs(4),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[4].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:768:2: note: in expansion of macro 'tf_regs'
768 | tf_regs(4),
| ^~~~~~~
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:769:2: note: in expansion of macro 'tf_regs'
769 | tf_regs(5),
| ^~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'tf_regs[5].CURSOR_CONTROL')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:502:14: note: in expansion of macro 'BASE'
502 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:181:2: note: in expansion of macro 'SRI'
181 | SRI(CURSOR_CONTROL, CURSOR0_, id),\
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:759:2: note: in expansion of macro 'TF_REG_LIST_DCN20'
759 | TF_REG_LIST_DCN20(id),\
| ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:769:2: note: in expansion of macro 'tf_regs'
769 | tf_regs(5),
| ^~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:70:
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17469:111: warning: initialized field overwritten [-Woverride-init]
17469 | #define CM0_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:368:2: note: in expansion of macro 'TF_SF'
368 | TF_SF(CM0_CM_3DLUT_MODE, CM_3DLUT_MODE, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:547:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_COMMON'
547 | TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:773:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
773 | TF_REG_LIST_SH_MASK_DCN20(__SHIFT),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17469:111: note: (near initialization for 'tf_shift.CM_3DLUT_MODE')
17469 | #define CM0_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_3DLUT_MODE__CM_3DLUT_MODE__SHIFT'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:368:2: note: in expansion of macro 'TF_SF'
368 | TF_SF(CM0_CM_3DLUT_MODE, CM_3DLUT_MODE, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:547:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_COMMON'
547 | TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:773:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
773 | TF_REG_LIST_SH_MASK_DCN20(__SHIFT),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17056:111: warning: initialized field overwritten [-Woverride-init]
17056 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:206:2: note: in expansion of macro 'TF_SF'
206 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh)
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:548:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED'
548 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:773:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
773 | TF_REG_LIST_SH_MASK_DCN20(__SHIFT),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17056:111: note: (near initialization for 'tf_shift.CM_SHAPER_LUT_MODE')
17056 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE__SHIFT'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:206:2: note: in expansion of macro 'TF_SF'
206 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh)
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:548:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED'
548 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:773:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
773 | TF_REG_LIST_SH_MASK_DCN20(__SHIFT),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17471:111: warning: initialized field overwritten [-Woverride-init]
17471 | #define CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK 0x00000003L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:368:2: note: in expansion of macro 'TF_SF'
368 | TF_SF(CM0_CM_3DLUT_MODE, CM_3DLUT_MODE, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:547:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_COMMON'
547 | TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:778:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
778 | TF_REG_LIST_SH_MASK_DCN20(_MASK),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17471:111: note: (near initialization for 'tf_mask.CM_3DLUT_MODE')
17471 | #define CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK 0x00000003L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:368:2: note: in expansion of macro 'TF_SF'
368 | TF_SF(CM0_CM_3DLUT_MODE, CM_3DLUT_MODE, mask_sh), \
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:547:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_COMMON'
547 | TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:778:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
778 | TF_REG_LIST_SH_MASK_DCN20(_MASK),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17057:111: warning: initialized field overwritten [-Woverride-init]
17057 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK 0x00000003L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:206:2: note: in expansion of macro 'TF_SF'
206 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh)
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:548:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED'
548 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:778:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
778 | TF_REG_LIST_SH_MASK_DCN20(_MASK),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:17057:111: note: (near initialization for 'tf_mask.CM_SHAPER_LUT_MODE')
17057 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK 0x00000003L
| ^~~~~~~~~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK'
38 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:206:2: note: in expansion of macro 'TF_SF'
206 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh)
| ^~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:548:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED'
548 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:778:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20'
778 | TF_REG_LIST_SH_MASK_DCN20(_MASK),
| ^~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:67:
>> drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:510:18: note: in expansion of macro 'BASE'
510 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h:42:2: note: in expansion of macro 'SRII'
42 | SRII(MPCC_BG_B_CB, MPCC, inst),\
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.h:34:2: note: in expansion of macro 'MPC_COMMON_REG_LIST_DCN1_0'
34 | MPC_COMMON_REG_LIST_DCN1_0(inst),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:817:3: note: in expansion of macro 'MPC_REG_LIST_DCN2_0'
817 | MPC_REG_LIST_DCN2_0(0),
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'mpc_regs.MPCC_BG_B_CB[0]')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:510:18: note: in expansion of macro 'BASE'
510 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h:42:2: note: in expansion of macro 'SRII'
42 | SRII(MPCC_BG_B_CB, MPCC, inst),\
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.h:34:2: note: in expansion of macro 'MPC_COMMON_REG_LIST_DCN1_0'
34 | MPC_COMMON_REG_LIST_DCN1_0(inst),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:817:3: note: in expansion of macro 'MPC_REG_LIST_DCN2_0'
817 | MPC_REG_LIST_DCN2_0(0),
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:510:18: note: in expansion of macro 'BASE'
510 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h:42:2: note: in expansion of macro 'SRII'
42 | SRII(MPCC_BG_B_CB, MPCC, inst),\
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.h:34:2: note: in expansion of macro 'MPC_COMMON_REG_LIST_DCN1_0'
34 | MPC_COMMON_REG_LIST_DCN1_0(inst),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:818:3: note: in expansion of macro 'MPC_REG_LIST_DCN2_0'
818 | MPC_REG_LIST_DCN2_0(1),
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: note: (near initialization for 'mpc_regs.MPCC_BG_B_CB[1]')
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:510:18: note: in expansion of macro 'BASE'
510 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h:42:2: note: in expansion of macro 'SRII'
42 | SRII(MPCC_BG_B_CB, MPCC, inst),\
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.h:34:2: note: in expansion of macro 'MPC_COMMON_REG_LIST_DCN1_0'
34 | MPC_COMMON_REG_LIST_DCN1_0(inst),\
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:818:3: note: in expansion of macro 'MPC_REG_LIST_DCN2_0'
818 | MPC_REG_LIST_DCN2_0(1),
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init]
269 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:493:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
493 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:495:19: note: in expansion of macro 'BASE_INNER'
495 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:510:18: note: in expansion of macro 'BASE'
510 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
| ^~~~
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h:42:2: note: in expansion of macro 'SRII'
42 | SRII(MPCC_BG_B_CB, MPCC, inst),\
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.h:34:2: note: in expansion of macro 'MPC_COMMON_REG_LIST_DCN1_0'
34 | MPC_COMMON_REG_LIST_DCN1_0(inst),\
..
vim +269 drivers/gpu/drm/amd/include/navi10_ip_offset.h
33934b3576b0ef Hawking Zhang 2019-03-04 266
33934b3576b0ef Hawking Zhang 2019-03-04 267 #define DCN_BASE__INST0_SEG0 0x00000012
33934b3576b0ef Hawking Zhang 2019-03-04 268 #define DCN_BASE__INST0_SEG1 0x000000C0
33934b3576b0ef Hawking Zhang 2019-03-04 @269 #define DCN_BASE__INST0_SEG2 0x000034C0
33934b3576b0ef Hawking Zhang 2019-03-04 270 #define DCN_BASE__INST0_SEG3 0x00009000
33934b3576b0ef Hawking Zhang 2019-03-04 271 #define DCN_BASE__INST0_SEG4 0
33934b3576b0ef Hawking Zhang 2019-03-04 272 #define DCN_BASE__INST0_SEG5 0
33934b3576b0ef Hawking Zhang 2019-03-04 273
:::::: The code at line 269 was first introduced by commit
:::::: 33934b3576b0ef86c7c03b88857b185f15a04732 drm/amdgpu: add navi10 ip offset header
:::::: TO: Hawking Zhang <Hawking.Zhang@xxxxxxx>
:::::: CC: Alex Deucher <alexander.deucher@xxxxxxx>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
Attachment:
.config.gz
Description: application/gzip
_______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
