> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@xxxxxxxxx>
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx; Shankar, Uma <uma.shankar@xxxxxxxxx>;
> Kulkarni, Vandita <vandita.kulkarni@xxxxxxxxx>; ville.syrjala@xxxxxxxxxxxxxxx;
> Sharma, Swati2 <swati2.sharma@xxxxxxxxx>
> Subject: [PATCH v2 03/13] drm/edid: Parse DSC1.2 cap fields from HFVSDB block
>
> This patch parses HFVSDB fields for DSC1.2 capabilities of an
> HDMI2.1 sink. These fields are required by a source to understand the DSC
> capability of the sink, to set appropriate PPS parameters, before transmitting
> compressed data stream.
>
> v2: Addressed following issues as suggested by Uma Shankar:
> -Added a new struct for hdmi dsc cap
> -Fixed bugs in macros usage.
Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx>
> ---
> drivers/gpu/drm/drm_edid.c | 59 +++++++++++++++++++++++++++++++++++++
> include/drm/drm_connector.h | 43 +++++++++++++++++++++++++++
> 2 files changed, 102 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index
> 26797868ea5b..feaf2d7659a4 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4939,11 +4939,70 @@ static void drm_parse_hdmi_forum_vsdb(struct
> drm_connector *connector,
>
> if (hf_vsdb[7]) {
> u8 max_frl_rate;
> + u8 dsc_max_frl_rate;
> + u8 dsc_max_slices;
> + struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
>
> DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
> max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK)
> >> 4;
> drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
> &hdmi->max_frl_rate_per_lane);
> + hdmi_dsc->v_1p2 = hf_vsdb[11] & DRM_EDID_DSC_1P2;
> +
> + if (hdmi_dsc->v_1p2) {
> + hdmi_dsc->native_420 = hf_vsdb[11] &
> DRM_EDID_DSC_NATIVE_420;
> + hdmi_dsc->all_bpp = hf_vsdb[11] &
> DRM_EDID_DSC_ALL_BPP;
> +
> + if (hf_vsdb[11] & DRM_EDID_DSC_16BPC)
> + hdmi_dsc->bpc_supported = 16;
> + else if (hf_vsdb[11] & DRM_EDID_DSC_12BPC)
> + hdmi_dsc->bpc_supported = 12;
> + else if (hf_vsdb[11] & DRM_EDID_DSC_10BPC)
> + hdmi_dsc->bpc_supported = 10;
> + else
> + hdmi_dsc->bpc_supported = 0;
> +
> + dsc_max_frl_rate = (hf_vsdb[12] &
> DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
> + drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc-
> >max_lanes,
> + &hdmi_dsc->max_frl_rate_per_lane);
> + hdmi_dsc->total_chunk_kbytes = hf_vsdb[13] &
> +DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
> +
> + dsc_max_slices = hf_vsdb[12] &
> DRM_EDID_DSC_MAX_SLICES;
> + switch (dsc_max_slices) {
> + case 1:
> + hdmi_dsc->max_slices = 1;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 2:
> + hdmi_dsc->max_slices = 2;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 3:
> + hdmi_dsc->max_slices = 4;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 4:
> + hdmi_dsc->max_slices = 8;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 5:
> + hdmi_dsc->max_slices = 8;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 6:
> + hdmi_dsc->max_slices = 12;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 7:
> + hdmi_dsc->max_slices = 16;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 0:
> + default:
> + hdmi_dsc->max_slices = 0;
> + hdmi_dsc->clk_per_slice = 0;
> + }
> + }
> }
>
> drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb); diff --git
> a/include/drm/drm_connector.h b/include/drm/drm_connector.h index
> f351bf10c076..06d24e36268e 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -175,6 +175,46 @@ struct drm_scdc {
> struct drm_scrambling scrambling;
> };
>
> +/**
> + * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink
> + *
> + * Describes the DSC support provided by HDMI 2.1 sink.
> + * The information is fetched fom additional HFVSDB blocks defined
> + * for HDMI 2.1.
> + */
> +struct drm_hdmi_dsc_cap {
> + /** @v_1p2: flag for dsc1.2 version support by sink */
> + bool v_1p2;
> +
> + /** @native_420: Does sink support DSC with 4:2:0 compression */
> + bool native_420;
> +
> + /**
> + * @all_bpp: Does sink support all bpp with 4:4:4: or 4:2:2
> + * compressed formats
> + */
> + bool all_bpp;
> +
> + /**
> + * @bpc_supported: compressed bpc supported by sink : 10, 12 or 16 bpc
> + */
> + u8 bpc_supported;
> +
> + /** @max_slices: maximum number of Horizontal slices supported by */
> + u8 max_slices;
> +
> + /** @clk_per_slice : max pixel clock in MHz supported per slice */
> + int clk_per_slice;
> +
> + /** @max_lanes : dsc max lanes supported for Fixed rate Link training */
> + u8 max_lanes;
> +
> + /** @max_frl_rate_per_lane : maximum frl rate with DSC per lane */
> + u8 max_frl_rate_per_lane;
> +
> + /** @total_chunk_kbytes: max size of chunks in KBs supported per line*/
> + u8 total_chunk_kbytes;
> +};
>
> /**
> * struct drm_hdmi_info - runtime information about the connected HDMI sink
> @@ -213,6 +253,9 @@ struct drm_hdmi_info {
>
> /** @max_lanes: supported by sink */
> u8 max_lanes;
> +
> + /** @dsc_cap: DSC capabilities of the sink */
> + struct drm_hdmi_dsc_cap dsc_cap;
> };
>
> /**
> --
> 2.17.1
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