On Wed, Nov 11, 2020 at 04:14:36AM +0300, Dmitry Osipenko wrote: > The latency allowness is calculated based on buffering capabilities of > memory clients. Add FIFO sizes to the Tegra30 memory clients. > > Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> > --- > drivers/memory/tegra/tegra30.c | 66 ++++++++++++++++++++++++++++++++++ > 1 file changed, 66 insertions(+) Thanks, applied. Best regards, Krzysztof _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
