On Mon, Oct 26, 2020 at 01:16:43AM +0300, Dmitry Osipenko wrote: > Hello, > > This series brings initial support for memory interconnect to Tegra20, > Tegra30 and Tegra124 SoCs. > > For the starter only display controllers and devfreq devices are getting > interconnect API support, others could be supported later on. The display > controllers have the biggest demand for interconnect API right now because > dynamic memory frequency scaling can't be done safely without taking into > account bandwidth requirement from the displays. In particular this series > fixes distorted display output on T30 Ouya and T124 TK1 devices. Hi, You introduced in v6 multiple new patches. Could you describe the dependencies, if any? Best regards, Krzysztof > Changelog: > > v6: - This series was massively reworked in comparison to v5, most of the > patches that previously got r-b need a new round of a review (!). > > - Added missed clk-rounding to the set() callback of EMC ICC providers. > Now clk_set_min_rate() doesn't error out on rate overflow. > > - Now peak bandwidth is properly taken into account by the set() callback > of EMC ICC providers. > > - EMC runs at 2x of the DRAM bus only on Tegra20, this now taken in account > properly by the EMC ICC set() callbacks. > > - ICC drivers use new icc_sync_state() and xlate_extended(). > > - ICC drivers support new TEGRA_MC_ICC_TAG_ISO for ICC paths, which > conveys to ICC driver that memory path uses isochronous transfers. > > - Added support for memory latency scaling to Tegra30 ICC provider. > It's required for fixing display FIFO underflows on T30. > > - Added basic interconnect support to Tegra124 drivers. > > - Tegra20/30/124 EMC drivers now support voltage scaling using generic > OPP API. > > - The display bandwidth management is reworked and improved. It now > supports both bandwidth and latency allocations. The nv-display is > now also taken into account properly, i.e. it's kept untouched. > The extra bandwidth reservation required for ISO clients is moved > from DC driver to the ICC drivers. > > - Dropped patch that tuned T20 display controller memory client because > turned out that it kills ~30% of memory bandwidth. It should be possible > to support client tuning, but it's too complicated for now. > > - Corrected display's cursor and winb-vfilter ICC clients. > The winb-vfilter was erroneously used in place of cursor's client > in device-trees. > > - Added devm_tegra_get_memory_controller() and switched drivers to > use it. > > - Device-tree OPP tables are now supported by memory and devfreq > drivers. > > - Tegra20-devfeq driver is reworked and now uses EMC-stats instead > of IMC-stats (which are nearly identical modules) because previously > I failed to understand how EMC-stats work and succeeded this time, > thinking that it simply doesn't work. This removes a bit icky dependency > on using both EMC and MC drivers simultaneously by the devfreq driver. > > - Tegra20-devfeq driver now is a sub-device of the EMC, it also now uses > interconnect API for driving memory bandwidth. > > - Tegra30-devfreq got interconnect support. > > - Devfreq patches now use dev_err_probe(), which was suggested by > Chanwoo Choi. > > - Added acks from Chanwoo Choi and Rob Herring to the reviewed and > unchanged patches. > > - Added tested-by from Peter Geis and Nicolas Chauvet, who tested this > series on Ouya and TK1 devices, reporting that it fixes display > corruption on these devices which happened due to insufficient memory > bandwidth. > > - Added patches to fix T20 EMC registers size. > > - Fixed missing LA entry for PTC in the Tegra MC drivers. > > - New and updated patches in v6: > > dt-bindings: memory: tegra20: emc: Correct registers range in example > dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property > dt-bindings: memory: tegra20: emc: Document OPP table and voltage regulator > dt-bindings: memory: tegra20: emc: Document mfd-simple compatible and statistics sub-device > dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator > dt-bindings: memory: tegra124: mc: Document new interconnect property > dt-bindings: memory: tegra124: emc: Document new interconnect property > dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator > dt-bindings: tegra30-actmon: Document OPP and interconnect properties > dt-bindings: memory: tegra124: Add memory client IDs > ARM: tegra: Correct EMC registers size in Tegra20 device-tree > ARM: tegra: Add interconnect properties to Tegra124 device-tree > ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree > ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node > ARM: tegra: Add DVFS properties to Tegra30 EMC and ACTMON device-tree nodes > ARM: tegra: Add DVFS properties to Tegra124 EMC and ACTMON device-tree nodes > memory: tegra: Add and use devm_tegra_get_memory_controller() > memory: tegra-mc: Add interconnect framework > memory: tegra20: Support interconnect framework > memory: tegra20-emc: Skip parsing of emc-stats DT sub-node > memory: tegra: Add missing latency allowness entry for Page Table Cache > memory: tegra: Add FIFO sizes to Tegra30 memory clients > memory: tegra30: Support interconnect framework > memory: tegra124-emc: Make driver modular > memory: tegra124: Support interconnect framework > memory: tegra: Remove superfluous error messages around platform_get_irq() > drm/tegra: dc: Support memory bandwidth management > drm/tegra: dc: Extend debug stats with total number of events > PM / devfreq: tegra20: Convert to EMC_STAT driver, support interconnect and device-tree > PM / devfreq: tegra30: Support interconnect and OPPs from device-tree > PM / devfreq: tegra30: Separate configurations per-SoC generation > opp: Put interconnect paths outside of opp_table_lock _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
