On Fri, 2020-10-16 at 12:00 -0500, Rob Herring wrote: > On Tue, Oct 13, 2020 at 04:52:00PM +0800, Chunfeng Yun wrote: > > Convert phy-mtk-xsphy.txt to YAML schema mediatek,xsphy.yaml > > > > Signed-off-by: Chunfeng Yun <chunfeng.yun@xxxxxxxxxxxx> > > --- > > v2: modify description and compatible definition suggested by Rob > > --- > > .../bindings/phy/mediatek,xsphy.yaml | 200 ++++++++++++++++++ > > .../devicetree/bindings/phy/phy-mtk-xsphy.txt | 109 ---------- > > 2 files changed, 200 insertions(+), 109 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-xsphy.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > new file mode 100644 > > index 000000000000..86511f19277a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml > > @@ -0,0 +1,200 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +# Copyright (c) 2020 MediaTek > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek XS-PHY Controller Device Tree Bindings > > + > > +maintainers: > > + - Chunfeng Yun <chunfeng.yun@xxxxxxxxxxxx> > > + > > +description: | > > + The XS-PHY controller supports physical layer functionality for USB3.1 > > + GEN2 controller on MediaTek SoCs. [...] > > + > > + ranges: true > > + > > + mediatek,src-ref-clk-mhz: > > + description: > > + Frequency of reference clock for slew rate calibrate > > + $ref: /schemas/types.yaml#/definitions/uint32 > > Properties with a standard unit suffix don't need a type. Ok, will remove it, and also do it for other patches, thanks > > -- [...] > > 2.18.0 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
