Hi Tim, thanks for the info! On Thu, 2020-10-01 at 11:15 +0100, Tim Gover wrote: > hdmi_enable_4k60=1 causes the firmware to select 3.3 GHz for the PLLC > VCO to support a core-frequency of 550 MHz which is the minimum > frequency required by the HVS at 4Kp60. The side effect is that if the > display clock requirements are lower than 4Kp60 then you will see > different core frequencies selected by DVFS. > > If enable_uart=1 and the mini-uart is selected (default unless What is the actual test made to check if mini-uart is selected? I can't get firmware to trigger this behaviour with 64-bit upstream kernel/dts. Note that I see the core clk setup at 200MHz just before having VC4 set it to 500MHz. The only thing I've got on my config.txt is: enable_uart=1 arm_64bit=1 Maybe we're missing some kind of DT alias upstream? Regards, Nicolas > bluetooth is disabled) then the firmware will pin the core-frequency > to either core_freq max (500 or 550). Although, I think there is a way > of pinning it to a lower fixed frequency. > > The table in overclocking.md defines options for setting the maximum > core frequency but unless core_freq_min is specified DVFS will > automatically pick the lowest idle frequency required by the display > resolution.
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