[radeon-alex:amd-staging-drm-next-vangogh 45/47] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:96:6: warning: no previous prototype for 'vg_update_clocks'

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tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next-vangogh
head:   6067a749d66ef3815908c86ee0b08733e391955f
commit: 356e0c5b8e5c7cd698641f3f7605d25ad793b159 [45/47] drm/amd/display: Add dcn3.01 support to DC
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
        git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
        git fetch --no-tags radeon-alex amd-staging-drm-next-vangogh
        git checkout 356e0c5b8e5c7cd698641f3f7605d25ad793b159
        # save the attached .config to linux build tree
        make W=1 ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:96:6: warning: no previous prototype for 'vg_update_clocks' [-Wmissing-prototypes]
      96 | void vg_update_clocks(struct clk_mgr *clk_mgr_base,
         |      ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:375:6: warning: no previous prototype for 'vg_get_clk_states' [-Wmissing-prototypes]
     375 | void vg_get_clk_states(struct clk_mgr *clk_mgr_base, struct clk_states *s)
         |      ^~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:393:6: warning: no previous prototype for 'vg_init_clocks' [-Wmissing-prototypes]
     393 | void vg_init_clocks(struct clk_mgr *clk_mgr)
         |      ^~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:43:
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:218:29: warning: 'VCN_BASE' defined but not used [-Wunused-const-variable=]
     218 | static const struct IP_BASE VCN_BASE = { { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:210:29: warning: 'USB_BASE' defined but not used [-Wunused-const-variable=]
     210 | static const struct IP_BASE USB_BASE = { { { { 0x0242A800, 0x05B00000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:202:29: warning: 'UMC_BASE' defined but not used [-Wunused-const-variable=]
     202 | static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:194:29: warning: 'THM_BASE' defined but not used [-Wunused-const-variable=]
     194 | static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0x02400C00, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:186:29: warning: 'SMUIO_BASE' defined but not used [-Wunused-const-variable=]
     186 | static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:178:29: warning: 'PCIE0_BASE' defined but not used [-Wunused-const-variable=]
     178 | static const struct IP_BASE PCIE0_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:170:29: warning: 'OSSSYS_BASE' defined but not used [-Wunused-const-variable=]
     170 | static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:162:29: warning: 'NBIO_BASE' defined but not used [-Wunused-const-variable=]
     162 | static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:154:29: warning: 'MP2_BASE' defined but not used [-Wunused-const-variable=]
     154 | static const struct IP_BASE MP2_BASE = { { { { 0x00016400, 0x02400800, 0x00F40000, 0x00F80000, 0x00FC0000, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:146:29: warning: 'MP1_BASE' defined but not used [-Wunused-const-variable=]
     146 | static const struct IP_BASE MP1_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:138:29: warning: 'MP0_BASE' defined but not used [-Wunused-const-variable=]
     138 | static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:130:29: warning: 'MMHUB_BASE' defined but not used [-Wunused-const-variable=]
     130 | static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:122:29: warning: 'ISP_BASE' defined but not used [-Wunused-const-variable=]
     122 | static const struct IP_BASE ISP_BASE = { { { { 0x00018000, 0x0240B000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:114:29: warning: 'HDP_BASE' defined but not used [-Wunused-const-variable=]
     114 | static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:106:29: warning: 'GC_BASE' defined but not used [-Wunused-const-variable=]
     106 | static const struct IP_BASE GC_BASE = { { { { 0x00001260, 0x0000A000, 0x02402C00, 0, 0, 0 } },
         |                             ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:98:29: warning: 'FUSE_BASE' defined but not used [-Wunused-const-variable=]
      98 | static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:90:29: warning: 'FCH_BASE' defined but not used [-Wunused-const-variable=]
      90 | static const struct IP_BASE FCH_BASE = { { { { 0x0240C000, 0x00B40000, 0x11000000, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:82:29: warning: 'DPCS_BASE' defined but not used [-Wunused-const-variable=]
      82 | static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:74:29: warning: 'DCN_BASE' defined but not used [-Wunused-const-variable=]
      74 | static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:66:29: warning: 'DF_BASE' defined but not used [-Wunused-const-variable=]
      66 | static const struct IP_BASE DF_BASE = { { { { 0x00007000, 0x0240B800, 0, 0, 0, 0 } },
         |                             ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:50:29: warning: 'ATHUB_BASE' defined but not used [-Wunused-const-variable=]
      50 | static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:42:29: warning: 'ACP_BASE' defined but not used [-Wunused-const-variable=]
      42 | static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:86,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/clk_mgr_internal.h:36,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:27:
   drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning: 'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=]
      50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
         |                                          ^~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/clk_mgr_internal.h:36,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:27:
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=]
     124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
         |                      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=]
     122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=]
     120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dccg.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:91:5: warning: no previous prototype for 'dcn301_smu_send_msg_with_param' [-Wmissing-prototypes]
      91 | int dcn301_smu_send_msg_with_param(
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:33:
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:218:29: warning: 'VCN_BASE' defined but not used [-Wunused-const-variable=]
     218 | static const struct IP_BASE VCN_BASE = { { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:210:29: warning: 'USB_BASE' defined but not used [-Wunused-const-variable=]
     210 | static const struct IP_BASE USB_BASE = { { { { 0x0242A800, 0x05B00000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:202:29: warning: 'UMC_BASE' defined but not used [-Wunused-const-variable=]
     202 | static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:194:29: warning: 'THM_BASE' defined but not used [-Wunused-const-variable=]
     194 | static const struct IP_BASE THM_BASE = { { { { 0x00016600, 0x02400C00, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:186:29: warning: 'SMUIO_BASE' defined but not used [-Wunused-const-variable=]
     186 | static const struct IP_BASE SMUIO_BASE = { { { { 0x00016800, 0x00016A00, 0x02401000, 0x00440000, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:178:29: warning: 'PCIE0_BASE' defined but not used [-Wunused-const-variable=]
     178 | static const struct IP_BASE PCIE0_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:170:29: warning: 'OSSSYS_BASE' defined but not used [-Wunused-const-variable=]
     170 | static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:162:29: warning: 'NBIO_BASE' defined but not used [-Wunused-const-variable=]
     162 | static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:154:29: warning: 'MP2_BASE' defined but not used [-Wunused-const-variable=]
     154 | static const struct IP_BASE MP2_BASE = { { { { 0x00016400, 0x02400800, 0x00F40000, 0x00F80000, 0x00FC0000, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:146:29: warning: 'MP1_BASE' defined but not used [-Wunused-const-variable=]
     146 | static const struct IP_BASE MP1_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E40000, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:130:29: warning: 'MMHUB_BASE' defined but not used [-Wunused-const-variable=]
     130 | static const struct IP_BASE MMHUB_BASE = { { { { 0x00013200, 0x0001A000, 0x02408800, 0, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:122:29: warning: 'ISP_BASE' defined but not used [-Wunused-const-variable=]
     122 | static const struct IP_BASE ISP_BASE = { { { { 0x00018000, 0x0240B000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:114:29: warning: 'HDP_BASE' defined but not used [-Wunused-const-variable=]
     114 | static const struct IP_BASE HDP_BASE = { { { { 0x00000F20, 0x0240A400, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:106:29: warning: 'GC_BASE' defined but not used [-Wunused-const-variable=]
     106 | static const struct IP_BASE GC_BASE = { { { { 0x00001260, 0x0000A000, 0x02402C00, 0, 0, 0 } },
         |                             ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:98:29: warning: 'FUSE_BASE' defined but not used [-Wunused-const-variable=]
      98 | static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:90:29: warning: 'FCH_BASE' defined but not used [-Wunused-const-variable=]
      90 | static const struct IP_BASE FCH_BASE = { { { { 0x0240C000, 0x00B40000, 0x11000000, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:82:29: warning: 'DPCS_BASE' defined but not used [-Wunused-const-variable=]
      82 | static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
         |                             ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:74:29: warning: 'DCN_BASE' defined but not used [-Wunused-const-variable=]
      74 | static const struct IP_BASE DCN_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:66:29: warning: 'DF_BASE' defined but not used [-Wunused-const-variable=]
      66 | static const struct IP_BASE DF_BASE = { { { { 0x00007000, 0x0240B800, 0, 0, 0, 0 } },
         |                             ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:58:29: warning: 'CLK_BASE' defined but not used [-Wunused-const-variable=]
      58 | static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:50:29: warning: 'ATHUB_BASE' defined but not used [-Wunused-const-variable=]
      50 | static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
         |                             ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:42:29: warning: 'ACP_BASE' defined but not used [-Wunused-const-variable=]
      42 | static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
         |                             ^~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:86,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning: 'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=]
      50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
         |                                          ^~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=]
     124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
         |                      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=]
     122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=]
     120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dc.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:141:6: warning: no previous prototype for 'dcn301_hw_sequencer_construct' [-Wmissing-prototypes]
     141 | void dcn301_hw_sequencer_construct(struct dc *dc)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:86,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning: 'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=]
      50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
         |                                          ^~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=]
     124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
         |                      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=]
     122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=]
     120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
         |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dc.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.h:29,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_init.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
--
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:66:
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[0].DP_SEC_METADATA_TRANSMISSION')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[0].HDMI_METADATA_PACKET_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[0].DIG_FE_CNTL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:447:2: note: in expansion of macro 'stream_enc_regs'
     447 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[1].DP_SEC_METADATA_TRANSMISSION')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[1].HDMI_METADATA_PACKET_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[1].DIG_FE_CNTL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:448:2: note: in expansion of macro 'stream_enc_regs'
     448 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[2].DP_SEC_METADATA_TRANSMISSION')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[2].HDMI_METADATA_PACKET_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[2].DIG_FE_CNTL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:449:2: note: in expansion of macro 'stream_enc_regs'
     449 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[3].DP_SEC_METADATA_TRANSMISSION')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:104:2: note: in expansion of macro 'SRI'
     104 |  SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[3].HDMI_METADATA_PACKET_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
     105 |  SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'stream_enc_regs[3].DIG_FE_CNTL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
     106 |  SRI(DIG_FE_CNTL, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:443:2: note: in expansion of macro 'SE_DCN3_REG_LIST'
     443 |  SE_DCN3_REG_LIST(id)\
         |  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:450:2: note: in expansion of macro 'stream_enc_regs'
     450 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:72:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:27667:111: warning: initialized field overwritten [-Woverride-init]
   27667 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
     214 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF'
     204 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:493:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST'
     493 |  DCN_AUX_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:27667:111: note: (near initialization for 'aux_shift.AUX_SW_AUTOINCREMENT_DISABLE')
   27667 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
     214 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF'
     204 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:493:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST'
     493 |  DCN_AUX_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:27671:111: warning: initialized field overwritten [-Woverride-init]
   27671 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
     214 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF'
     204 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:497:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST'
     497 |  DCN_AUX_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:27671:111: note: (near initialization for 'aux_mask.AUX_SW_AUTOINCREMENT_DISABLE')
   27671 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
     214 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF'
     204 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:497:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST'
     497 |  DCN_AUX_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:29741:111: warning: initialized field overwritten [-Woverride-init]
   29741 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:166:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
     166 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: in expansion of macro 'LE_SF'
     184 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_dio_link_encoder.h:59:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
      59 |  LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:508:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN301'
     508 |  LINK_ENCODER_MASK_SH_LIST_DCN301(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:29741:111: note: (near initialization for 'le_shift.TMDS_CTL0')
   29741 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:166:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
     166 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: in expansion of macro 'LE_SF'
     184 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_dio_link_encoder.h:59:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
      59 |  LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:508:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN301'
     508 |  LINK_ENCODER_MASK_SH_LIST_DCN301(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:29745:111: warning: initialized field overwritten [-Woverride-init]
   29745 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:166:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
     166 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: in expansion of macro 'LE_SF'
     184 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_dio_link_encoder.h:59:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
      59 |  LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:512:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN301'
     512 |  LINK_ENCODER_MASK_SH_LIST_DCN301(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_1_sh_mask.h:29745:111: note: (near initialization for 'le_mask.TMDS_CTL0')
   29745 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:166:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
     166 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: in expansion of macro 'LE_SF'
     184 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_dio_link_encoder.h:59:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
      59 |  LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:512:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN301'
     512 |  LINK_ENCODER_MASK_SH_LIST_DCN301(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:66:
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[0].CM_GAMCOR_LUT_INDEX')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[0].CURSOR_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:162:2: note: in expansion of macro 'SRI'
     162 |  SRI(CM_BLNDGAM_CONTROL, CM, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[0].CM_BLNDGAM_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:162:2: note: in expansion of macro 'SRI'
     162 |  SRI(CM_BLNDGAM_CONTROL, CM, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:539:2: note: in expansion of macro 'dpp_regs'
     539 |  dpp_regs(0),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[1].CM_GAMCOR_LUT_INDEX')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[1].CURSOR_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:162:2: note: in expansion of macro 'SRI'
     162 |  SRI(CM_BLNDGAM_CONTROL, CM, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[1].CM_BLNDGAM_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:162:2: note: in expansion of macro 'SRI'
     162 |  SRI(CM_BLNDGAM_CONTROL, CM, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:540:2: note: in expansion of macro 'dpp_regs'
     540 |  dpp_regs(1),
         |  ^~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:541:2: note: in expansion of macro 'dpp_regs'
     541 |  dpp_regs(2),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[2].CM_GAMCOR_LUT_INDEX')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:541:2: note: in expansion of macro 'dpp_regs'
     541 |  dpp_regs(2),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:541:2: note: in expansion of macro 'dpp_regs'
     541 |  dpp_regs(2),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: note: (near initialization for 'dpp_regs[2].CURSOR_CONTROL')
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:252:19: note: in expansion of macro 'BASE_INNER'
     252 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:259:14: note: in expansion of macro 'BASE'
     259 |  .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:155:2: note: in expansion of macro 'SRI'
     155 |  SRI(CURSOR_CONTROL, CURSOR0_, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:160:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     160 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:535:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     535 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:541:2: note: in expansion of macro 'dpp_regs'
     541 |  dpp_regs(2),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/vangogh_ip_offset.h:454:52: warning: initialized field overwritten [-Woverride-init]
     454 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:250:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     250 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
..

vim +/vg_update_clocks +96 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.c

    95	
  > 96	void vg_update_clocks(struct clk_mgr *clk_mgr_base,
    97				struct dc_state *context,
    98				bool safe_to_lower)
    99	{
   100		struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
   101		struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
   102		struct dc *dc = clk_mgr_base->ctx->dc;
   103		int display_count;
   104		bool update_dppclk = false;
   105		bool update_dispclk = false;
   106		bool dpp_clock_lowered = false;
   107	
   108		if (dc->work_arounds.skip_clock_update)
   109			return;
   110	
   111		/*
   112		 * if it is safe to lower, but we are already in the lower state, we don't have to do anything
   113		 * also if safe to lower is false, we just go in the higher state
   114		 */
   115		if (safe_to_lower) {
   116			/* check that we're not already in lower */
   117			if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_LOW_POWER) {
   118	
   119				display_count = vg_get_active_display_cnt_wa(dc, context);
   120				/* if we can go lower, go lower */
   121				if (display_count == 0) {
   122					union display_idle_optimization_u idle_info = { 0 };
   123	
   124					idle_info.idle_info.df_request_disabled = 1;
   125					idle_info.idle_info.phy_ref_clk_off = 1;
   126	
   127					dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data);
   128					/* update power state */
   129					clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_LOW_POWER;
   130				}
   131			}
   132		} else {
   133			/* check that we're not already in D0 */
   134			if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_MISSION_MODE) {
   135				union display_idle_optimization_u idle_info = { 0 };
   136	
   137				dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data);
   138				/* update power state */
   139				clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_MISSION_MODE;
   140			}
   141		}
   142	
   143		if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {
   144			clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
   145			dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz);
   146		}
   147	
   148		if (should_set_clock(safe_to_lower,
   149				new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) {
   150			clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
   151			dcn301_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz);
   152		}
   153	
   154		// workaround: Limit dppclk to 100Mhz to avoid lower eDP panel switch to plus 4K monitor underflow.
   155		if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
   156			if (new_clocks->dppclk_khz < 100000)
   157				new_clocks->dppclk_khz = 100000;
   158		}
   159	
   160		if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) {
   161			if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz)
   162				dpp_clock_lowered = true;
   163			clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz;
   164			update_dppclk = true;
   165		}
   166	
   167		if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
   168			clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
   169			dcn301_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
   170	
   171			update_dispclk = true;
   172		}
   173	
   174		if (dpp_clock_lowered) {
   175			// increase per DPP DTO before lowering global dppclk
   176			dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
   177			dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
   178		} else {
   179			// increase global DPPCLK before lowering per DPP DTO
   180			if (update_dppclk || update_dispclk)
   181				dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
   182			// always update dtos unless clock is lowered and not safe to lower
   183			if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
   184				dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
   185		}
   186	}
   187	

---
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