On Thu, 2012-09-06 at 17:41 +0300, Meelis Roos wrote: > [drm] radeon defaulting to kernel modesetting. > [drm] radeon kernel modesetting enabled. > PCI: Enabling device: (0000:02:02.0), cmd 82 > [drm] initializing kernel modesetting (RV100 0x1002:0x5159 0x1002:0x0908). > [drm] register mmio base: 0x10000000 > [drm] register mmio size: 32768 > [drm:radeon_device_init] *ERROR* Unable to find PCI I/O BAR This particular message looks like it might actually be harmless, all the code paths that use the I/O BAR can use the MMIO mirror of it instead. No idea how well tested that is, but at any rate it's not what's breaking your setup. > And here the machine hangs. Debugging printk-s reveal that it does not > find any active I/O port resources and then continues into initializing > the card. Down in igp_read_bios_from_vram() it successfully ioremaps > memory region 0 (vram_base=1ff08000000 and size=40000) and tries to read > 2 bytes from there and hangs on reading bios[0]. This is probably because... > 02:02.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI RV100 QY [Radeon 7000/VE] (prog-if 00 [VGA controller]) > Subsystem: Advanced Micro Devices [AMD] nee ATI XVR-100 (supplied by Sun) > Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx- > Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0 (2000ns min) > Interrupt: pin A routed to IRQ 16 > Region 0: Memory at 08000000 (32-bit, prefetchable) [size=64M] > Region 1: I/O ports at 0400 [disabled] [size=256] > Region 2: Memory at 10000000 (32-bit, non-prefetchable) [size=32K] > Region 3: [virtual] Memory at fffffe0100000000 (32-bit, non-prefetchable) [size=1] > Region 4: [virtual] Memory at fffffe0100000000 (32-bit, non-prefetchable) [size=1] > Region 5: [virtual] Memory at fffffe0100000000 (32-bit, non-prefetchable) [size=1] > Expansion ROM at 10020000 [disabled] [size=128K] ... the ROM BAR looks like it's not routed. On x86 you could fix this by booting with 'pci=rom' to force the ROM BAR to be routed regardless of firmware setup, no idea how that's meant to work on sparc though. - ajax
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