Hi, On Tue, Sep 01, 2020 at 01:45:07PM +0900, Chanwoo Choi wrote: > Hi Maxime, > > On 7/9/20 2:42 AM, Maxime Ripard wrote: > > The HDMI controllers found in the BCM2711 SoC need some adjustments to the > > bindings, especially since the registers have been shuffled around in more > > register ranges. > > > > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > > Signed-off-by: Maxime Ripard <maxime@xxxxxxxxxx> > > --- > > Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml | 109 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- > > 1 file changed, 109 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > > new file mode 100644 > > index 000000000000..6091fe3d315b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > > @@ -0,0 +1,109 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: https://protect2.fireeye.com/url?k=556aeb05-08b8fda0-556b604a-0cc47a31bee8-c3a0ebd1d22c3183&q=1&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbrcm%2Cbcm2711-hdmi.yaml%23 > > +$schema: https://protect2.fireeye.com/url?k=24fa660c-792870a9-24fbed43-0cc47a31bee8-0bf16f4fd60f0ab4&q=1&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > > + > > +title: Broadcom BCM2711 HDMI Controller Device Tree Bindings > > + > > +maintainers: > > + - Eric Anholt <eric@xxxxxxxxxx> > > + > > +properties: > > + compatible: > > + enum: > > + - brcm,bcm2711-hdmi0 > > + - brcm,bcm2711-hdmi1 > > + > > + reg: > > + items: > > + - description: HDMI controller register range > > + - description: DVP register range > > + - description: HDMI PHY register range > > + - description: Rate Manager register range > > + - description: Packet RAM register range > > + - description: Metadata RAM register range > > + - description: CSC register range > > + - description: CEC register range > > + - description: HD register range > > + > > + reg-names: > > + items: > > + - const: hdmi > > + - const: dvp > > + - const: phy > > + - const: rm > > + - const: packet > > + - const: metadata > > + - const: csc > > + - const: cec > > + - const: hd > > + > > + clocks: > > + description: The HDMI state machine clock > > I'm not sure the following description is correct. > But, this description doesn't contain the information of audio clock. > > description: The HDMI state machine and audio clock > > > + > > + clock-names: > > + const: hdmi > > This patch is missing the following clock information for audio clock. > > const: clk-108M > > > + > > + ddc: > > + allOf: > > + - $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > > + Phandle of the I2C controller used for DDC EDID probing > > + > > + hpd-gpios: > > + description: > > > + The GPIO pin for the HDMI hotplug detect (if it doesn't appear > > + as an interrupt/status bit in the HDMI controller itself) > > + > > + dmas: > > + maxItems: 1 > > + description: > > > + Should contain one entry pointing to the DMA channel used to > > + transfer audio data. > > + > > + dma-names: > > + const: audio-rx > > + > > + resets: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - reg-names > > + - clocks > > + - resets > > + - ddc > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + hdmi0: hdmi@7ef00700 { > > + compatible = "brcm,bcm2711-hdmi0"; > > + reg = <0x7ef00700 0x300>, > > + <0x7ef00300 0x200>, > > + <0x7ef00f00 0x80>, > > + <0x7ef00f80 0x80>, > > + <0x7ef01b00 0x200>, > > + <0x7ef01f00 0x400>, > > + <0x7ef00200 0x80>, > > + <0x7ef04300 0x100>, > > + <0x7ef20000 0x100>; > > + reg-names = "hdmi", > > + "dvp", > > + "phy", > > + "rm", > > + "packet", > > + "metadata", > > + "csc", > > + "cec", > > + "hd"; > > + clocks = <&firmware_clocks 13>; > > + clock-names = "hdmi"; > > Also, this example doesn't include the instance of audio clock. > Need to edit them as following: > > clock-names = "hdmi", "clk-108M"; > clocks = <&firmware_clocks 13>, <&dvp 0>; Indeed, thanks for pointing it out Maxime
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