On Mon, May 11, 2020 at 09:47:08AM +0200, Sam Ravnborg wrote:
> Hi Richard.
>
> On Sat, May 09, 2020 at 01:18:34PM +0200, srk@xxxxx wrote:
> > From: Sean Cross <xobs@xxxxxxxxxx>
> >
> > The Innolux N133HSE panel is a 13.3" 1920x1080 panel that contains an
> > integrated backlight, and connects via eDP.
> >
> > It is used in the Kosagi Novena.
>
> Thanks for the patch.
>
>
> >
> > Signed-off-by: Sean Cross <xobs@xxxxxxxxxx>
> > Signed-off-by: Richard Marko <srk@xxxxx>
> > Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
> > Cc: Fabio Estevam <fabio.estevam@xxxxxxx>
> > Cc: Thierry Reding <thierry.reding@xxxxxxxxx>
> > To: dri-devel@xxxxxxxxxxxxxxxxxxxxx
> > ---
> > drivers/gpu/drm/panel/panel-simple.c | 27 +++++++++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> > index 3ad828eaefe1..c8a93771d398 100644
> > --- a/drivers/gpu/drm/panel/panel-simple.c
> > +++ b/drivers/gpu/drm/panel/panel-simple.c
> > @@ -1906,6 +1906,30 @@ static const struct panel_desc innolux_n116bge = {
> > },
> > };
> >
> > +static const struct drm_display_mode innolux_n133hse_ea1_mode = {
> > + .clock = 138500,
> > + .hdisplay = 1920,
> > + .hsync_start = 1920 + 46,
> > + .hsync_end = 1920 + 46 + 30,
> > + .htotal = 1920 + 46 + 30 + 84,
> > + .vdisplay = 1080,
> > + .vsync_start = 1080 + 2,
> > + .vsync_end = 1080 + 2 + 4,
> > + .vtotal = 1080 + 2 + 4 + 26,
> > + .vrefresh = 60,
> > +};
> > +
> > +static const struct panel_desc innolux_n133hse_ea1 = {
> > + .modes = &innolux_n133hse_ea1_mode,
> > + .num_modes = 1,
> > + .bpc = 8,
> > + .size = {
> > + .width = 293,
> > + .height = 165,
> > + },
> > + .connector_type = DRM_MODE_CONNECTOR_eDP,
> Please include .bus_format and .bus_flags info too.
>
> We are relying more and more on this type of info so we need it to be
> present.
I am wondering which of the flags make sense for eDP and how the bus
format should be described?
Some eDP panels seems [1] to specify DRM_BUS_FLAG_DATA_MSB_TO_LSB and
DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE, but I am not sure what sense they make
for packet data with embedded clock that eDP uses? (Unless, of course,
my understanding of eDP is entirely missing the point.)
This panel uses RGB888 data over two differential pairs. Would
format = MEDIA_BUS_FMT_RGB888_1X24 be appropriate?
[1] N133HSE-EA1 Datasheet
http://www.vslcd.com/specification/N133HSE-EA1.pdf
> Sam
Thank you,
Lubo
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