Use the same standard as used on other Hisilicon DRM
config vars for kirin9xx.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
---
.../staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.c | 2 +-
.../staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.h | 2 +-
drivers/staging/hikey9xx/gpu/kirin9xx_drm_dss.c | 12 ++++++------
.../hikey9xx/gpu/kirin9xx_drm_overlay_utils.c | 2 +-
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.c b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.c
index 8aa43619c888..fe8372838bb3 100644
--- a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.c
+++ b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.c
@@ -993,7 +993,7 @@ int dpe_regulator_disable(struct dss_hw_ctx *ctx)
return -EINVAL;
}
- #if defined (CONFIG_HISI_FB_970)
+ #if defined (CONFIG_DRM_HISI_KIRIN970)
dpe_set_pixel_clk_rate_on_pll0(ctx);
dpe_set_common_clk_rate_on_pll0(ctx);
#endif
diff --git a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.h b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.h
index 5ef5c6c6edbb..89aaf6691f1d 100644
--- a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.h
+++ b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dpe_utils.h
@@ -14,7 +14,7 @@
#ifndef KIRIN_DRM_DPE_UTILS_H
#define KIRIN_DRM_DPE_UTILS_H
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
#include "kirin970_dpe_reg.h"
#else
#include "kirin_dpe_reg.h"
diff --git a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dss.c b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dss.c
index 693f5499c8d0..b4c1bb8288de 100644
--- a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dss.c
+++ b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_dss.c
@@ -37,7 +37,7 @@
#include "kirin_drm_drv.h"
#include "kirin_drm_dpe_utils.h"
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
#include "kirin970_dpe_reg.h"
#else
#include "kirin_dpe_reg.h"
@@ -45,7 +45,7 @@
//#define DSS_POWER_UP_ON_UEFI
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
#define DTS_COMP_DSS_NAME "hisilicon,kirin970-dpe"
#else
#define DTS_COMP_DSS_NAME "hisilicon,hi3660-dpe"
@@ -310,7 +310,7 @@ static int dss_power_up(struct dss_crtc *acrtc)
struct dss_hw_ctx *ctx = acrtc->ctx;
int ret = 0;
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
mediacrg_regulator_enable(ctx);
dpe_common_clk_enable(ctx);
dpe_inner_clk_enable(ctx);
@@ -706,7 +706,7 @@ static int dss_dts_parse(struct platform_device *pdev, struct dss_hw_ctx *ctx)
return -ENXIO;
}
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
ret = of_property_read_u32(np, "dss_version_tag", &dss_version_tag);
if (ret) {
DRM_ERROR("failed to get dss_version_tag.\n");
@@ -756,7 +756,7 @@ static int dss_dts_parse(struct platform_device *pdev, struct dss_hw_ctx *ctx)
return -ENXIO;
}
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
ctx->pmctrl_base = of_iomap(np, 5);
if (!(ctx->pmctrl_base)) {
DRM_ERROR ("failed to get dss pmctrl_base resource.\n");
@@ -780,7 +780,7 @@ static int dss_dts_parse(struct platform_device *pdev, struct dss_hw_ctx *ctx)
DRM_INFO("dss irq = %d. \n", ctx->irq);
#ifndef DSS_POWER_UP_ON_UEFI
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
ctx->dpe_regulator = devm_regulator_get(dev, REGULATOR_PDP_NAME);
if (!ctx->dpe_regulator) {
DRM_ERROR("failed to get dpe_regulator resource! ret=%d.\n", ret);
diff --git a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_overlay_utils.c b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_overlay_utils.c
index 6246316d81b0..342a7f6fc964 100644
--- a/drivers/staging/hikey9xx/gpu/kirin9xx_drm_overlay_utils.c
+++ b/drivers/staging/hikey9xx/gpu/kirin9xx_drm_overlay_utils.c
@@ -30,7 +30,7 @@
static int mid_array[DSS_CHN_MAX_DEFINE] = {0xb, 0xa, 0x9, 0x8, 0x7, 0x6, 0x5, 0x4, 0x2, 0x1, 0x3, 0x0};
-#if defined (CONFIG_HISI_FB_970)
+#if defined (CONFIG_DRM_HISI_KIRIN970)
uint32_t g_dss_module_base[DSS_CHN_MAX_DEFINE][MODULE_CHN_MAX] = {
// D0
{
--
2.26.2
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