On Tue, Aug 18, 2020 at 8:09 AM Colin King <colin.king@xxxxxxxxxxxxx> wrote: > > From: Colin Ian King <colin.king@xxxxxxxxxxxxx> > > The 32 bit unsigned integer bl_pwm is being shifted using 32 bit arithmetic > and then being assigned to a 64 bit unsigned integer. There is a potential > for a 32 bit overflow so cast bl_pwm to enforce a 64 bit shift operation > to avoid this. > > Addresses-Coverity: ("unintentional integer overflow") > Fixes: 3ba01817365c ("drm/amd/display: Move panel_cntl specific register from abm to panel_cntl.") > Signed-off-by: Colin Ian King <colin.king@xxxxxxxxxxxxx> Applied. Thanks! Alex > --- > drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c b/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > index a6d73d30837c..df7f826eebd8 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c > @@ -76,7 +76,7 @@ static unsigned int dce_get_16_bit_backlight_from_pwm(struct panel_cntl *panel_c > else > bl_pwm &= 0xFFFF; > > - current_backlight = bl_pwm << (1 + bl_int_count); > + current_backlight = (uint64_t)bl_pwm << (1 + bl_int_count); > > if (bl_period == 0) > bl_period = 0xFFFF; > -- > 2.27.0 > > _______________________________________________ > dri-devel mailing list > dri-devel@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel