On 12/08/2020 14:26, Tomi Valkeinen wrote:
> This patch implements WA for AM65xx erratum i2000, which causes YUV
> formats to show wrong colors.
>
> An earlier patch removed a partial WA:
>
> a8d9d7da1546349f18eb2d6b6b3a04bdeb38719d ("drm/tidss: remove AM65x PG1 YUV erratum code")
>
> The patch explains the reasoning for removal. The change in plans has
> been that it has become clear that there are and will be users for PG1
> SoCs and as such it's good to implement the WA for PG1s.
>
> This patch adds the WA back so that it is only used on SR1.0 (which is
> the new name for PG1). The previous WA code didn't check the SoC
> revision, which this patch does.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@xxxxxx>
Reviewed-by: Jyri Sarha <jsarha@xxxxxx>
> ---
> drivers/gpu/drm/tidss/tidss_dispc.c | 32 +++++++++++++++++++++++++----
> drivers/gpu/drm/tidss/tidss_dispc.h | 4 ++++
> 2 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
> index 629dd06393f6..a3e8caf319bb 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -19,6 +19,7 @@
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/regmap.h>
> +#include <linux/sys_soc.h>
>
> #include <drm/drm_fourcc.h>
> #include <drm/drm_fb_cma_helper.h>
> @@ -302,6 +303,8 @@ struct dispc_device {
> u32 num_fourccs;
>
> u32 memory_bandwidth_limit;
> +
> + struct dispc_errata errata;
> };
>
> static void dispc_write(struct dispc_device *dispc, u16 reg, u32 val)
> @@ -2641,6 +2644,19 @@ static int dispc_init_am65x_oldi_io_ctrl(struct device *dev,
> return 0;
> }
>
> +static void dispc_init_errata(struct dispc_device *dispc)
> +{
> + static const struct soc_device_attribute am65x_sr10_soc_devices[] = {
> + { .family = "AM65X", .revision = "SR1.0" },
> + { /* sentinel */ }
> + };
> +
> + if (soc_device_match(am65x_sr10_soc_devices)) {
> + dispc->errata.i2000 = true;
> + dev_info(dispc->dev, "WA for erratum i2000: YUV formats disabled\n");
> + }
> +}
> +
> int dispc_init(struct tidss_device *tidss)
> {
> struct device *dev = tidss->dev;
> @@ -2664,19 +2680,27 @@ int dispc_init(struct tidss_device *tidss)
> if (!dispc)
> return -ENOMEM;
>
> + dispc->tidss = tidss;
> + dispc->dev = dev;
> + dispc->feat = feat;
> +
> + dispc_init_errata(dispc);
> +
> dispc->fourccs = devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats),
> sizeof(*dispc->fourccs), GFP_KERNEL);
> if (!dispc->fourccs)
> return -ENOMEM;
>
> num_fourccs = 0;
> - for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i)
> + for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i) {
> + if (dispc->errata.i2000 &&
> + dispc_fourcc_is_yuv(dispc_color_formats[i].fourcc)) {
> + continue;
> + }
> dispc->fourccs[num_fourccs++] = dispc_color_formats[i].fourcc;
> + }
>
> dispc->num_fourccs = num_fourccs;
> - dispc->tidss = tidss;
> - dispc->dev = dev;
> - dispc->feat = feat;
>
> dispc_common_regmap = dispc->feat->common_regs;
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h
> index 902e612ff7ac..353972fe658a 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.h
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.h
> @@ -46,6 +46,10 @@ struct dispc_features_scaling {
> u32 xinc_max;
> };
>
> +struct dispc_errata {
> + bool i2000; /* DSS Does Not Support YUV Pixel Data Formats */
> +};
> +
> enum dispc_vp_bus_type {
> DISPC_VP_DPI, /* DPI output */
> DISPC_VP_OLDI, /* OLDI (LVDS) output */
>
--
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