The current logic for probing ddc is limited to
2 blocks (256 bytes), this patch adds support
for the 4 block (512) data.
To do this, a single 8-bit segment index is
passed to the display via the I2C address 30h.
Data from the selected segment is then immediately
read via the regular DDC2 address using a repeated
I2C 'START' signal.
Signed-off-by: Shirish S <s.shirish@xxxxxxxxxxx>
---
drivers/gpu/drm/drm_edid.c | 19 +++++++++++++------
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a8743c3..33a3888 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -253,7 +253,9 @@ static int
drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
int block, int len)
{
- unsigned char start = block * EDID_LENGTH;
+ unsigned short start = block * EDID_LENGTH;
+ unsigned char segment = block >> 1;
+ unsigned short segFlags = segment ? 0 : I2C_M_IGNORE_NAK;
int ret, retries = 5;
/* The core i2c driver will automatically retry the transfer if the
@@ -264,27 +266,32 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
*/
do {
struct i2c_msg msgs[] = {
- {
+ { /*set segment pointer */
+ .addr = DDC_SEGMENT_ADDR,
+ .flags = segFlags,
+ .len = 1,
+ .buf = &segment,
+ }, { /*set offset */
.addr = DDC_ADDR,
.flags = 0,
.len = 1,
.buf = &start,
- }, {
+ }, { /*set data */
.addr = DDC_ADDR,
.flags = I2C_M_RD,
.len = len,
.buf = buf,
}
};
- ret = i2c_transfer(adapter, msgs, 2);
+ ret = i2c_transfer(adapter, msgs, 3);
if (ret == -ENXIO) {
DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
adapter->name);
break;
}
- } while (ret != 2 && --retries);
+ } while (ret != 3 && --retries);
- return ret == 2 ? 0 : -1;
+ return ret == 3 ? 0 : -1;
}
static bool drm_edid_is_zero(u8 *in_edid, int length)
--
1.7.0.4
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