On Tue, Aug 21, 2012 at 06:55:53AM -0700, Shirish S wrote: > Hello Ville Syrjälä, > > On Tue, Aug 21, 2012 at 4:26 AM, Ville Syrjälä < > ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > > On Tue, Aug 21, 2012 at 12:40:48PM +0530, Shirish S wrote: > > > The current logic for probing ddc is limited to > > > 2 blocks (256 bytes), this patch adds support > > > for the 4 block (512) data. > > > > A patch for this was already sent a long time ago: > > http://lists.freedesktop.org/archives/dri-devel/2011-December/017246.html > > > > I tried the patch you have mentioned,but its not working in my setup. > Also did anyone else test this!! Not that I know. > I find that although the author asks the i2c to read for 3 msgs, it > verifies only for 2.Kindly correct me if i am wrong. Yeah, it looks like the return value isn't checked correctly. > My patch i have verified on the analyser for exynos5 platform. Your patch always sends the segment which seems a bit pointless, and possibly questionable in case a non-EDDC display gets confused by the segment information. Jean's patch only sends the segment when needed, which feels like the safer option, and it would also avoid increasing the amount of i2c traffic. Here are my earlier comments on Jean's patch: http://lists.freedesktop.org/archives/dri-devel/2012-February/019069.html -- Ville Syrjälä Intel OTC _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
