On Tue, Aug 21, 2012 at 4:26 AM, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
Regards,On Tue, Aug 21, 2012 at 12:40:48PM +0530, Shirish S wrote:A patch for this was already sent a long time ago:
> The current logic for probing ddc is limited to
> 2 blocks (256 bytes), this patch adds support
> for the 4 block (512) data.
http://lists.freedesktop.org/archives/dri-devel/2011-December/017246.html
I tried the patch you have mentioned,but its not working in my setup.
Also did anyone else test this!!
I find that although the author asks the i2c to read for 3 msgs, it verifies only for 2.Kindly correct me if i am wrong.
My patch i have verified on the analyser for exynos5 platform.
--
Ville Syrjälä
Intel OTC
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Shirish S
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