Modifying the <syncrst> field in mgag200_{enable,disable}_display()
makes the code more readable. Also clear the <asyncrst> field to enable
the display. The other bits in SEQ0 are unused, so no functional changes
are made.
Signed-off-by: Thomas Zimmermann <tzimmermann@xxxxxxx>
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 17 +++++++++++------
drivers/gpu/drm/mgag200/mgag200_reg.h | 3 +++
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 05f8aa50b908..679eb5abe24d 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1284,7 +1284,12 @@ static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev)
static void mgag200_enable_display(struct mga_device *mdev)
{
- u8 seq1, crtcext1;
+ u8 seq0, seq1, crtcext1;
+
+ RREG_SEQ(0x00, seq0);
+ seq0 |= MGAREG_SEQ0_SYNCRST |
+ MGAREG_SEQ0_ASYNCRST;
+ WREG_SEQ(0x00, seq0);
/*
* TODO: replace busy waiting with vblank IRQ; put
@@ -1307,7 +1312,11 @@ static void mgag200_enable_display(struct mga_device *mdev)
static void mgag200_disable_display(struct mga_device *mdev)
{
- u8 seq1, crtcext1;
+ u8 seq0, seq1, crtcext1;
+
+ RREG_SEQ(0x00, seq0);
+ seq0 &= ~MGAREG_SEQ0_SYNCRST;
+ WREG_SEQ(0x00, seq0);
/*
* TODO: replace busy waiting with vblank IRQ; put
@@ -1338,9 +1347,6 @@ static void mga_crtc_prepare(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = to_mga_device(dev);
- /* start sync reset */
- WREG_SEQ(0, 1);
-
if (mdev->type == G200_WB || mdev->type == G200_EW3)
mga_g200wb_prepare(crtc);
}
@@ -1357,7 +1363,6 @@ static void mga_crtc_commit(struct drm_crtc *crtc)
if (mdev->type == G200_WB || mdev->type == G200_EW3)
mga_g200wb_commit(crtc);
- WREG_SEQ(0, 0x3);
mga_crtc_load_lut(crtc);
mgag200_enable_display(mdev);
}
diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h
index 9f0be1878854..c3b7bcad52ed 100644
--- a/drivers/gpu/drm/mgag200/mgag200_reg.h
+++ b/drivers/gpu/drm/mgag200/mgag200_reg.h
@@ -236,6 +236,9 @@
#define MGAREG_SEQ_INDEX 0x1fc4
#define MGAREG_SEQ_DATA 0x1fc5
+#define MGAREG_SEQ0_ASYNCRST BIT(0)
+#define MGAREG_SEQ0_SYNCRST BIT(1)
+
#define MGAREG_SEQ1_SCROFF BIT(5)
#define MGAREG_CRTC_INDEX 0x1fd4
--
2.27.0
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