Thanks for the review, pushed to drm-misc Manasi On Sat, Jun 20, 2020 at 02:53:54AM +0530, Bhanuprakash Modem wrote: > From: Manasi Navare <manasi.d.navare@xxxxxxxxx> > > DP sink device sets the Ignore MSA bit in its > DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to > ignore the MSA video timing parameters and its ability to support > seamless video timing change over a range of timing exposed by > DisplayID and EDID. > This is required for the sink to indicate that it is Adaptive sync > capable. > > v3: > * Fi the typo in commit message (Manasi) > v2: > * Rename to describe what the function does (Jani Nikula) > > Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Harry Wentland <harry.wentland@xxxxxxx> > Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@xxxxxxx> > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> > Reviewed-by: Harry Wentland <harry.wentland@xxxxxxx> > --- > include/drm/drm_dp_helper.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index 1165ec105638..e47dc22ebf50 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -1457,6 +1457,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) > DP_ALTERNATE_SCRAMBLER_RESET_CAP; > } > > +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */ > +static inline bool > +drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) > +{ > + return dpcd[DP_DOWN_STREAM_PORT_COUNT] & > + DP_MSA_TIMING_PAR_IGNORED; > +} > + > /* > * DisplayPort AUX channel > */ > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel