Re: [RFC] Remove AGP support from Radeon/Nouveau/TTM

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On Wed, May 13, 2020 at 12:26 PM Michel Dänzer <michel@xxxxxxxxxxx> wrote:
>
> On 2020-05-13 11:28 a.m., Rui Salvaterra wrote:
> > On Wed, 13 May 2020 at 08:19, Daniel Vetter <daniel@xxxxxxxx> wrote:
> >>
> >> i915 is even worse, we manually mess around with clflush. In
> >> userspace. So really there's 2 axis for dma memory: coherent vs.
> >> non-coherent (which is something the dma-api somewhat exposed), i.e.
> >> do you need to clflush or not, and cached vs uncached, i.e. are the
> >> PAT entries wc or wb.
> >
> > So, the PowerPC AGP GART ends up being cached and non-coherent, right
> > (assuming there's no way to set the page attributes MTRR/PAT-style)?
>
> It was uncached when I was using my last-gen PowerBook (until a few
> years ago), though it's possible that broke since then. I don't remember
> the details how it's done offhand though.
>
> The only theoretical problem there was that the kernel still had a
> cacheable mapping of the same memory, and any access via that (e.g.
> prefetch due to access to a neighbouring page) could trigger a machine
> check. But I don't remember ever hitting that. Maybe I was just lucky
> all those years.

At least on arm this has been a big topic, since it indeed randomly
kills machines. That's why you can't remap random pages as wc, they
have to be in highmem. I thought ppc is equally easily angered. And
the trouble is that just the existance of the mapping is enough to
cause a machine check exception iirc. So down to pure luck.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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