Hi,
On 22/04/2020 23:12, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Tue, Apr 21, 2020 at 3:44 PM Neil Armstrong <narmstrong@xxxxxxxxxxxx> wrote:
> [...]
>> diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> index e8c94915a4fc..dc3d5122475a 100644
>> --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
>> @@ -695,6 +695,13 @@ dw_hdmi_mode_valid(struct drm_connector *connector,
>> dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
>> __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
>>
>> + /* Check against soc revision/package limits */
>> + if (priv->limits) {
>> + if (priv->limits->max_hdmi_phy_freq &&
>> + phy_freq > priv->limits->max_hdmi_phy_freq)
>> + return MODE_CLOCK_HIGH;
>> + }
> I think that this will also be useful for the 32-bit SoCs as well.
> is there a chance you can move it to meson_vclk_vic_supported_freq
> (called right below), where all the existing frequency limit checks
> are already?
It would need to add priv to meson_vclk_vic_supported_freq(), but indeed,
would be cleaner.
And the meson_vclk_dmt_supported_freq() would also need this test aswell.
I'll resend with these fixed.
Neil
>
>
> Thank you!
> Martin
>
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