Hi, On 15/04/2020 14:43, H. Nikolaus Schaller wrote: > >> Am 15.04.2020 um 12:12 schrieb Maxime Ripard <maxime@xxxxxxxxxx>: >> >> Hi, >> >> On Wed, Apr 15, 2020 at 10:35:08AM +0200, H. Nikolaus Schaller wrote: >>> The Imagination PVR/SGX GPU is part of several SoC from >>> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, >>> Allwinner A83 and others. >>> >>> With this binding, we describe how the SGX processor is >>> interfaced to the SoC (registers, interrupt etc.). >>> >>> In most cases, Clock, Reset and power management is handled >>> by a parent node or elsewhere (e.g. code in the driver). >> >> Wouldn't the "code in the driver" still require the clock / reset / >> power domain to be set in the DT? > > Well, some SoC seem to use existing clocks and have no reset. > Or, although not recommended, they may have the io-address range > hard-coded. The possible clocks and resets should be added, even if optional. Please look at the arm utgard, midgard and bifrost bindings. Neil > > BR, > Nikolaus > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
