On Tue, 17 Mar 2020, Manasi Navare <manasi.d.navare@xxxxxxxxx> wrote:
> DP sink device sets the Ignore MSA bit in its
> DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
> ignore the MSA video timing paramaters and its ability to support
> seamless video timing change over a range of timing exposed by
> DisplayID and EDID.
> This is required for the sink to indicate that it is Adaptive sync
> capable.
>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Harry Wentland <harry.wentland@xxxxxxx>
> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@xxxxxxx>
> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> ---
> include/drm/drm_dp_helper.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c6119e4c169a..ccd6e2e988b9 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -1315,6 +1315,14 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> DP_ALTERNATE_SCRAMBLER_RESET_CAP;
> }
>
> +/* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
> +static inline bool
> +drm_dp_sink_is_capable_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
>From the department of nitpicks, if you read the name of the function
aloud, what does it actually mean?
Is sink capable of *what*?
BR,
Jani.
> +{
> + return dpcd[DP_DOWN_STREAM_PORT_COUNT] &
> + DP_MSA_TIMING_PAR_IGNORED;
> +}
> +
> /*
> * DisplayPort AUX channel
> */
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel
