On Thu, Feb 13, 2020 at 10:18:57PM +0200, Andrey Lebedev wrote:
> From: Andrey Lebedev <andrey@xxxxxxxxxx>
>
> Define pins for LVDS channels 0 and 1, configure reset line for tcon0 and
> provide sample LVDS panel, connected to tcon0.
>
> Signed-off-by: Andrey Lebedev <andrey@xxxxxxxxxx>
> ---
> arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> index 92b5be97085d..3b3c366a2bee 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -47,6 +47,7 @@
> #include <dt-bindings/dma/sun4i-a10.h>
> #include <dt-bindings/clock/sun7i-a20-ccu.h>
> #include <dt-bindings/reset/sun4i-a10-ccu.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -407,8 +408,8 @@
> compatible = "allwinner,sun7i-a20-tcon";
> reg = <0x01c0c000 0x1000>;
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> - resets = <&ccu RST_TCON0>;
> - reset-names = "lcd";
> + resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
> + reset-names = "lcd", "lvds";
> clocks = <&ccu CLK_AHB_LCD0>,
> <&ccu CLK_TCON0_CH0>,
> <&ccu CLK_TCON0_CH1>;
> @@ -444,6 +445,11 @@
> #size-cells = <0>;
> reg = <1>;
>
> + tcon0_out_lvds: endpoint@0 {
> + reg = <0>;
> + allwinner,tcon-channel = <0>;
> + };
> +
> tcon0_out_hdmi: endpoint@1 {
> reg = <1>;
> remote-endpoint = <&hdmi_in_tcon0>;
> @@ -1162,6 +1168,24 @@
> pins = "PI20", "PI21";
> function = "uart7";
> };
> +
> + /omit-if-no-ref/
> + lcd_lvds0_pins: lcd-lvds0-pins {
The nodes here should be ordered by alphabetical order
> + pins =
I'm not sure why you need a new line here
> + "PD0", "PD1", "PD2", "PD3", "PD4",
> + "PD5", "PD6", "PD7", "PD8", "PD9";
> + function = "lvds0";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
And allwinner,drive is also deprecated and at its default value anyway
Maxime
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