On Fri, Feb 7, 2020 at 5:38 AM <harigovi@xxxxxxxxxxxxxx> wrote: > > On 2020-02-06 20:29, Jeffrey Hugo wrote: > > On Thu, Feb 6, 2020 at 2:13 AM Harigovindan P <harigovi@xxxxxxxxxxxxxx> > > wrote: > >> > >> For a given byte clock, if VCO recalc value is exactly same as > >> vco set rate value, vco_set_rate does not get called assuming > >> VCO is already set to required value. But Due to GDSC toggle, > >> VCO values are erased in the HW. To make sure VCO is programmed > >> correctly, we forcefully call set_rate from vco_prepare. > > > > Is this specific to certain SoCs? I don't think I've observed this. > > As far as Qualcomm SOCs are concerned, since pll is analog and the value > is directly read from hardware if we get recalc value same as set rate > value, the vco_set_rate will not be invoked. We checked in our idp > device which has the same SOC but it works there since the rates are > different. This doesn't seem to be an answer to my question. What Qualcomm SoCs does this issue apply to? Everything implementing the 10nm pll? One specific SoC? I don't believe I've seen this on MSM8998, nor SDM845, so I'm interested to know what is the actual impact here. I don't see an "IDP" SoC in the IP catalog, so I really have no idea what you are referring to. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
