On Mon, Dec 23, 2019 at 3:19 AM Harigovindan P <harigovi@xxxxxxxxxxxxxx> wrote:
>
> Updating REG_DSI_LANE_CTRL register value by reading default
> register value and writing it back using bitwise OR with
> DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST. This works for all panels.
Why?
You explain what the code does, which I can tell from reading the
code. The commit text should tell me why this change is necessary.
Why would I care if this change is in my tree or not? What feature
does it provide or what issue does it fix?
>
> Signed-off-by: Harigovindan P <harigovi@xxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index e6289a3..d3c5233 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -816,7 +816,7 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable,
> u32 flags = msm_host->mode_flags;
> enum mipi_dsi_pixel_format mipi_fmt = msm_host->format;
> const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
> - u32 data = 0;
> + u32 data = 0, lane_ctrl = 0;
>
> if (!enable) {
> dsi_write(msm_host, REG_DSI_CTRL, 0);
> @@ -904,9 +904,11 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable,
> dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL,
> DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(msm_host->dlane_swap));
>
> - if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
> + if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) {
> + lane_ctrl = dsi_read(msm_host, REG_DSI_LANE_CTRL);
> dsi_write(msm_host, REG_DSI_LANE_CTRL,
> - DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST);
> + lane_ctrl | DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST);
> + }
>
> data |= DSI_CTRL_ENABLE;
>
> --
> 2.7.4
>
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