Hi, Bibby: You move the mutex protection to [PATCH v2 6/6] drm/mediatek: apply CMDQ control flow, but the race condition exist in this patch. So you should move that back in this patch. Regards, CK On Tue, 2019-12-03 at 15:10 +0800, Bibby Hsieh wrote: > Support to async updates of cursors by using the new atomic > interface for that. > > Signed-off-by: Bibby Hsieh <bibby.hsieh@xxxxxxxxxxxx> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 33 ++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 2 + > drivers/gpu/drm/mediatek/mtk_drm_plane.c | 50 ++++++++++++++++++++++++ > drivers/gpu/drm/mediatek/mtk_drm_plane.h | 2 + > 4 files changed, 87 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index 4c25ad2182b0..b23fe74b8b0a 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -422,6 +422,39 @@ int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane, > return 0; > } > > +void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane, > + struct drm_plane_state *new_state) > +{ > + struct mtk_drm_private *priv = crtc->dev->dev_private; > + struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); > + const struct drm_plane_helper_funcs *plane_helper_funcs = > + plane->helper_private; > + int i; > + > + if (!mtk_crtc->enabled) > + return; > + > + plane_helper_funcs->atomic_update(plane, new_state); > + > + for (i = 0; i < mtk_crtc->layer_nr; i++) { > + struct drm_plane *plane = &mtk_crtc->planes[i]; > + struct mtk_plane_state *plane_state; > + > + plane_state = to_mtk_plane_state(plane->state); > + if (plane_state->pending.async_dirty) { > + plane_state->pending.config = true; > + plane_state->pending.async_update = false; > + plane_state->pending.async_dirty = false; > + } > + } > + mtk_crtc->pending_planes = true; > + if (priv->data->shadow_register) { > + mtk_disp_mutex_acquire(mtk_crtc->mutex); > + mtk_crtc_ddp_config(crtc); > + mtk_disp_mutex_release(mtk_crtc->mutex); > + } > +} > + > static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc, > struct drm_crtc_state *old_state) > { > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h > index 6afe1c19557a..a2b4677a451c 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h > @@ -21,5 +21,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > unsigned int path_len); > int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane, > struct mtk_plane_state *state); > +void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane, > + struct drm_plane_state *plane_state); > > #endif /* MTK_DRM_CRTC_H */ > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > index cd7c97eb7ee6..6bdb42f068fb 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c > @@ -7,6 +7,7 @@ > #include <drm/drm_atomic.h> > #include <drm/drm_atomic_helper.h> > #include <drm/drm_fourcc.h> > +#include <drm/drm_atomic_uapi.h> > #include <drm/drm_plane_helper.h> > #include <drm/drm_gem_framebuffer_helper.h> > > @@ -70,6 +71,50 @@ static void mtk_drm_plane_destroy_state(struct drm_plane *plane, > kfree(to_mtk_plane_state(state)); > } > > +static int mtk_plane_atomic_async_check(struct drm_plane *plane, > + struct drm_plane_state *state) > +{ > + struct drm_crtc_state *crtc_state; > + > + if (plane != state->crtc->cursor) > + return -EINVAL; > + > + if (!plane->state) > + return -EINVAL; > + > + if (!plane->state->fb) > + return -EINVAL; > + > + if (state->state) > + crtc_state = drm_atomic_get_existing_crtc_state(state->state, > + state->crtc); > + else /* Special case for asynchronous cursor updates. */ > + crtc_state = state->crtc->state; > + > + return drm_atomic_helper_check_plane_state(plane->state, crtc_state, > + DRM_PLANE_HELPER_NO_SCALING, > + DRM_PLANE_HELPER_NO_SCALING, > + true, true); > +} > + > +static void mtk_plane_atomic_async_update(struct drm_plane *plane, > + struct drm_plane_state *new_state) > +{ > + struct mtk_plane_state *state = to_mtk_plane_state(plane->state); > + > + plane->state->crtc_x = new_state->crtc_x; > + plane->state->crtc_y = new_state->crtc_y; > + plane->state->crtc_h = new_state->crtc_h; > + plane->state->crtc_w = new_state->crtc_w; > + plane->state->src_x = new_state->src_x; > + plane->state->src_y = new_state->src_y; > + plane->state->src_h = new_state->src_h; > + plane->state->src_w = new_state->src_w; > + state->pending.async_update = true; > + > + mtk_drm_crtc_async_update(new_state->crtc, plane, new_state); > +} > + > static const struct drm_plane_funcs mtk_plane_funcs = { > .update_plane = drm_atomic_helper_update_plane, > .disable_plane = drm_atomic_helper_disable_plane, > @@ -141,6 +186,9 @@ static void mtk_plane_atomic_update(struct drm_plane *plane, > state->pending.rotation = plane->state->rotation; > wmb(); /* Make sure the above parameters are set before update */ > state->pending.dirty = true; > + > + if (state->pending.async_update) > + state->pending.async_dirty = true; > } > > static void mtk_plane_atomic_disable(struct drm_plane *plane, > @@ -158,6 +206,8 @@ static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = { > .atomic_check = mtk_plane_atomic_check, > .atomic_update = mtk_plane_atomic_update, > .atomic_disable = mtk_plane_atomic_disable, > + .atomic_async_update = mtk_plane_atomic_async_update, > + .atomic_async_check = mtk_plane_atomic_async_check, > }; > > int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h b/drivers/gpu/drm/mediatek/mtk_drm_plane.h > index 760885e35b27..41882465dd67 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.h > @@ -22,6 +22,8 @@ struct mtk_plane_pending_state { > unsigned int height; > unsigned int rotation; > bool dirty; > + bool async_dirty; > + bool async_update; > }; > > struct mtk_plane_state { _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel