Hi: All
Komeda HW (two pipelines) can work on side by side mode, which splits the
internal display processing to two halves (LEFT/RIGHT) and handle them by
two pipelines separately and simultaneously.
And since one single pipeline only handles the half display frame, so the
main engine clock requirement can also be halved.
The data flow of side_by_side as blow:
slave.layer0 ->\ /-> slave.wb_layer -> mem.fb.right_part
... -> slave.compiz ->
slave.layer3 ->/ \-> slave.improcessor->
\ /-> output-link0
master.layer0 ->\ /-> master.improcessor ->\-> output-link1
... -> master.compiz ->
master.layer3 ->/ \-> master.wb_layer -> mem.fb.left_part
v3: Rebase
james qian wang (Arm Technology China) (6):
drm/komeda: Add side by side assembling
drm/komeda: Add side by side plane_state split
drm/komeda: Build side by side display output pipeline
drm/komeda: Add side by side support for writeback
drm/komeda: Update writeback signal for side_by_side
drm/komeda: Expose side_by_side by sysfs/config_id
.../drm/arm/display/include/malidp_product.h | 3 +-
.../arm/display/komeda/d71/d71_component.c | 4 +
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 54 ++--
.../gpu/drm/arm/display/komeda/komeda_dev.c | 4 +
.../gpu/drm/arm/display/komeda/komeda_dev.h | 9 +
.../gpu/drm/arm/display/komeda/komeda_kms.h | 8 +
.../drm/arm/display/komeda/komeda_pipeline.c | 50 +++-
.../drm/arm/display/komeda/komeda_pipeline.h | 39 ++-
.../display/komeda/komeda_pipeline_state.c | 277 +++++++++++++++++-
.../gpu/drm/arm/display/komeda/komeda_plane.c | 7 +-
.../arm/display/komeda/komeda_wb_connector.c | 11 +-
11 files changed, 421 insertions(+), 45 deletions(-)
--
2.20.1
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