Add interconnect properties to the memory controller, external memory controller and the display controller nodes to describe interconnection of these nodes. Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> --- arch/arm/boot/dts/tegra20.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 9c58e7fcf5c0..2aa10a34516b 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -3,6 +3,7 @@ #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/memory/tegra20-mc.h> #include <dt-bindings/pinctrl/pinctrl-tegra.h> +#include <dt-bindings/interconnect/tegra-icc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> / { @@ -108,6 +109,9 @@ nvidia,head = <0>; + interconnects = <&mc TEGRA_ICC_MC_DC &emc TEGRA_ICC_EMEM>; + interconnect-names = "dma-mem"; + rgb { status = "disabled"; }; @@ -125,6 +129,9 @@ nvidia,head = <1>; + interconnects = <&mc TEGRA_ICC_MC_DCB &emc TEGRA_ICC_EMEM>; + interconnect-names = "dma-mem"; + rgb { status = "disabled"; }; @@ -624,15 +631,17 @@ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; #iommu-cells = <0>; + #interconnect-cells = <1>; }; - memory-controller@7000f400 { + emc: memory-controller@7000f400 { compatible = "nvidia,tegra20-emc"; reg = <0x7000f400 0x200>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_EMC>; #address-cells = <1>; #size-cells = <0>; + #interconnect-cells = <1>; }; fuse@7000f800 { -- 2.23.0 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel