On Tue, 2019-10-15 at 16:35 +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@xxxxxxxxxx>
>
> Use microsecond sleeps for the clock recovery and channel equalization
> delays during link training. The duration of these delays can be from
> 100 us up to 16 ms. It is rude to busy-loop for that amount of time.
>
> While at it, also convert to standard coding style by putting the
> opening braces in a function definition on a new line.
>
> v2: use correct multiplier for training delays (Philipp Zabel)
>
> Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> ---
> drivers/gpu/drm/drm_dp_helper.c | 30 ++++++++++++++++++------------
> 1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c
> b/drivers/gpu/drm/drm_dp_helper.c
> index 8f2d7c4850ca..ad2671d2ee8f 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -120,33 +120,39 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8
> link_status[DP_LINK_STATUS_SI
> }
> EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
>
> -void drm_dp_link_train_clock_recovery_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE]) {
> - int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> - DP_TRAINING_AUX_RD_MASK;
> +void drm_dp_link_train_clock_recovery_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
> +{
> + unsigned int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_TRAINING_AUX_RD_MASK;
Did you mean to put this conversion from signed to unsigned in the previous
patch?
>
> if (rd_interval > 4)
> - DRM_DEBUG_KMS("AUX interval %d, out of range (max 4)\n",
> + DRM_DEBUG_KMS("AUX interval %u, out of range (max 4)\n",
> rd_interval);
>
> if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
> - udelay(100);
> + rd_interval = 100;
> else
> - mdelay(rd_interval * 4);
> + rd_interval *= 4 * USEC_PER_MSEC;
> +
> + usleep_range(rd_interval, rd_interval * 2);
> }
> EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
>
> -void drm_dp_link_train_channel_eq_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE]) {
> - int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> - DP_TRAINING_AUX_RD_MASK;
> +void drm_dp_link_train_channel_eq_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
> +{
> + unsigned int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_TRAINING_AUX_RD_MASK;
>
> if (rd_interval > 4)
> - DRM_DEBUG_KMS("AUX interval %d, out of range (max 4)\n",
> + DRM_DEBUG_KMS("AUX interval %u, out of range (max 4)\n",
> rd_interval);
>
> if (rd_interval == 0)
> - udelay(400);
> + rd_interval = 400;
> else
> - mdelay(rd_interval * 4);
> + rd_interval *= 4 * USEC_PER_MSEC;
> +
> + usleep_range(rd_interval, rd_interval * 2);
> }
> EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
>
--
Cheers,
Lyude Paul
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel
