Comment # 1
on bug 111273
from Trek
Created attachment 145226 [details] [review] possible fix The proposed fix is tested on latest git. I'm unsure if 65536 is a good limit: it could be small as 64, but even if the longest consecutive registers are 48, may be in the future they are increased and no one remember to higher that limit. Anyway it should not be larger than the PCI BAR area for memory mapped registers, that on my KAVERI is 256K, thus 65536 registers. ciao!
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