On Wed, Aug 21, 2019 at 06:57:24PM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@xxxxxxxxxxxx>
>
> Signed-off-by: Rob Clark <robdclark@xxxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 45bfac9e3af7..c5653771e8fa 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -1040,8 +1040,21 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
> pstate->multirect_mode);
>
> if (pdpu->pipe_hw->ops.setup_format) {
> + unsigned int rotation;
> +
> src_flags = 0x0;
>
> + rotation = drm_rotation_simplify(state->rotation,
> + DRM_MODE_ROTATE_0 |
> + DRM_MODE_REFLECT_X |
> + DRM_MODE_REFLECT_Y);
> +
> + if (rotation & DRM_MODE_REFLECT_X)
> + src_flags |= DPU_SSPP_FLIP_UD;
> +
> + if (rotation & DRM_MODE_REFLECT_Y)
> + src_flags |= DPU_SSPP_FLIP_LR;
> +
UD vs. LR (assuming those mean what I think they mean) seem the wrong
way around here.
>
> /* update format */
> pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, fmt, src_flags,
> pstate->multirect_index);
> @@ -1522,6 +1535,13 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
> if (ret)
> DPU_ERROR("failed to install zpos property, rc = %d\n", ret);
>
> + drm_plane_create_rotation_property(plane,
> + DRM_MODE_ROTATE_0,
> + DRM_MODE_ROTATE_0 |
> + DRM_MODE_ROTATE_180 |
> + DRM_MODE_REFLECT_X |
> + DRM_MODE_REFLECT_Y);
> +
> drm_plane_enable_fb_damage_clips(plane);
>
> /* success! finalize initialization */
> --
> 2.21.0
>
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--
Ville Syrjälä
Intel
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