This is another iteration to support split pagetables for Adreno GPUs as part of an incremental process to enable per-context pagetables. In order to support per-context pagetables the GPU needs to enable split pagetables so that we can store the global buffers in the TTBR1 space leaving the GPU free to program the TTBR0 register with the page address of a context specific pt. Previous revisions of this series can be found at [1] and [2]. This iteration is built on top of the arm-smmu-impl and arm-smmu-v2 rework code from Robin Murphy [3] and [4]. This code is based on the realization that when split pagetables are enabled the configuration for the T1 address space is identical to that of the T0 space, so we can just take the TCR configuration provided by io-pgtable, duplicate it and shift it by 16 bits. Since the current split pagetable implementation is specific to the Adreno GPUs we can also take a small shortcut and only allow split pagetables for SMMUs with a 49 bit upstream bus which allows us to use the default configuration for the sign extension bit and we can avoid a lot of extra code to handle different upstream bus sizes that will never get used. The first patch implements the split pagetable support for arm-smmu-v2. The second adds a SMMU model for the Adreno GPU SMMU and enables the split pagetables if conditions warrant. The 3rd and 4th patches add a domain attribute to query the status of split pagetables. The remaining patches modify drm/msm slightly to allow a6xx targets to recognize if split pagetables are enabled and adjust the address space accordingly. This series only includes support for split pagetables because I wanted to get this out for discussion and I haven't ported over the aux domain code to this kernel version, but I don't suspect it will end up being much different than previous versions [5]. [1] https://patchwork.freedesktop.org/series/63403/ [2] https://patchwork.freedesktop.org/series/64874/ [3] https://lists.linuxfoundation.org/pipermail/iommu/2019-August/037905.html [4] https://lists.linuxfoundation.org/pipermail/iommu/2019-August/038244.html [5] https://patchwork.freedesktop.org/patch/307601/ Jordan Crouse (7): iommu/arm-smmu: Support split pagetables dt-bindings: arm-smmu: Add Adreno GPU variant iommu/arm-smmu: Add a SMMU variant for the Adreno GPU iommu: Add DOMAIN_ATTR_SPLIT_TABLES iommu/arm-smmu: Support DOMAIN_ATTR_SPLIT_TABLES drm/msm: Create the msm_mmu object independently from the address space drm/msm: Use per-target functions to set up address spaces .../devicetree/bindings/iommu/arm,smmu.txt | 7 +++ drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 28 +++++++++++ drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 1 + drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 56 ++++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 43 ++++++++++++++--- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 16 ++++--- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 16 ++++--- drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 4 -- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 13 ++++- drivers/gpu/drm/msm/msm_drv.h | 8 +--- drivers/gpu/drm/msm/msm_gem_vma.c | 30 ++---------- drivers/gpu/drm/msm/msm_gpu.c | 51 ++------------------ drivers/gpu/drm/msm/msm_gpu.h | 4 +- drivers/iommu/arm-smmu-impl.c | 15 ++++++ drivers/iommu/arm-smmu.c | 46 ++++++++++++++++-- drivers/iommu/arm-smmu.h | 2 + include/linux/iommu.h | 1 + 20 files changed, 237 insertions(+), 111 deletions(-) -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
