On Thu, Aug 15, 2019 at 10:34:17AM +0200, Linus Walleij wrote: > On Thu, Aug 15, 2019 at 2:49 AM Brian Masney <masneyb@xxxxxxxxxxxxx> wrote: > > > pm8941 is missing the 5vs2 regulator node so let's add it since its > > needed to get the external display working. This regulator was already > > configured in the interrupts property on the parent node. > > > > Note that this regulator is referred to as mvs2 in the downstream MSM > > kernel sources. > > When I looked at it it seemed like this convention is used for power > supplies that appear on both the main PMIC and the "extra (boot? basic? > low power?) PMIC that the main 80xx PMIC has mvs1 and the > other 89xx PMIC has mvs2. According to the downstream MSM sources, the 5vs1 and 5vs2 rails are both on the second pm8941 PMIC: https://github.com/AICP/kernel_lge_hammerhead/blob/n7.1/arch/arm/boot/dts/msm8974-regulator.dtsi#L18 > I suppose it is named "mvs" on both PMICs and this is just a rail > name so as not to confuse the schematic? That sounds reasonable. > > Signed-off-by: Brian Masney <masneyb@xxxxxxxxxxxxx> > > Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Thank you! Brian _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
