On Thu, Aug 15, 2019 at 10:59 AM Kai-Heng Feng <kai.heng.feng@xxxxxxxxxxxxx> wrote: > > at 21:33, Deucher, Alexander <Alexander.Deucher@xxxxxxx> wrote: > > > Thanks for finding this! I think the attached patch should fix the issue > > and it's much less invasive. > > Yes it also fix the issue, please add by tested-by: > Tested-by: Kai-Heng Feng <kai.heng.feng@xxxxxxxxxxxxx> > Thanks! > I took this more or less future proof approach because I think this won’t > be the last chip that needs firmware information, which isn’t available in > early init, to decides its flags. > > Yes it’s intrusive to carve out all flags from early init callbacks, but I > don’t think it’s that ugly. Not a bad approach, but I'd prefer to keep the power and clock gating flags in the asic specifc code rather than in the common code. Alex _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
