Re: [PATCH 3/5] arm64: dts: renesas: r8a77995: Add LVDS support

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Hi Laurent,

On Sun, May 20, 2018 at 10:50 AM, Laurent Pinchart
<laurent.pinchart@xxxxxxxxxxxxxxxx> wrote:
> On Tuesday, 15 May 2018 15:20:38 EEST Ulrich Hecht wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>> [uli: moved lvds* into the soc node, added PM domains, resets]
>> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@xxxxxxxxx>
>> ---
>>  arch/arm64/boot/dts/renesas/r8a77995.dtsi | 56 ++++++++++++++++++++++++++++
>>  1 file changed, 56 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index ba98865..8e78110d 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -757,12 +757,68 @@
>>                               port@1 {
>>                                       reg = <1>;
>>                                       du_out_lvds0: endpoint {
>> +                                             remote-endpoint = <&lvds0_in>;
>>                                       };
>>                               };
>>
>>                               port@2 {
>>                                       reg = <2>;
>>                                       du_out_lvds1: endpoint {
>> +                                             remote-endpoint = <&lvds1_in>;
>> +                                     };
>> +                             };
>> +                     };
>> +             };
>> +
>> +             lvds0: lvds-encoder@feb90000 {
>> +                     compatible = "renesas,r8a77995-lvds";
>> +                     reg = <0 0xfeb90000 0 0x20>;
>> +                     clocks = <&cpg CPG_MOD 727>;
>> +                     power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>> +                     resets = <&cpg 727>;
>> +                     status = "disabled";
>> +
>> +                     ports {
>> +                             #address-cells = <1>;
>> +                             #size-cells = <0>;
>> +
>> +                             port@0 {
>> +                                     reg = <0>;
>> +                                     lvds0_in: endpoint {
>> +                                             remote-endpoint = <&du_out_lvds0>;
>> +                                     };
>> +                             };
>> +
>> +                             port@1 {
>> +                                     reg = <1>;
>> +                                     lvds0_out: endpoint {
>> +                                     };
>> +                             };
>> +                     };
>> +             };
>> +
>> +             lvds1: lvds-encoder@feb90100 {
>> +                     compatible = "renesas,r8a77995-lvds";
>> +                     reg = <0 0xfeb90100 0 0x20>;
>> +                     clocks = <&cpg CPG_MOD 727>;
>> +                     power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
>> +                     resets = <&cpg 727>;
>
> While there seems to be a single clock for both LVDS encoders, it appears that
> two separate reset lines are used.

Nice catch!

So you can reset the individual LVDS instances, but not the individual DU
instances. Doh...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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