Hi Wladimir,
On Fri, 2017-03-31 at 07:36 +0200, Wladimir J. van der Laan wrote:
> Hello,
>
> I can't get the DVI output to work on a i.MX51 EVP board (babbage). There
> seems to be no signal at all. The board is running the mainline kernel 4.11.0-rc4 as of a
> day ago (89970a0).
>
> - The connector and cable works. u-boot (v2016.07-rc2) shows a penguin at boot.
> However while the Linux kernel boots, the signal goes away: monitor (a fairly
> old Dell 24" panel, max resolution 1600x1200, works fine with Linux/DRM with other
> hardware) goes to sleep mode.
>
> - Monitor is connected through HDMI<->DVI cable, could try another monitor if
> that's potentially the issue (Could it be EDID related? I'd guess not as the timings
> are hardcoded in the device tree).
>
> - Haven't changed anything in the dtb with regard to port config or resolution
> or timings. The default ones in imx51-babbage.dts should theoretically just
> work. I checked and these are the same as in u-boot:
>
> timing0: dvi {
> clock-frequency = <65000000>;
> hactive = <1024>;
> vactive = <768>;
> hback-porch = <220>;
> hfront-porch = <40>;
> vback-porch = <21>;
> vfront-porch = <7>;
> hsync-len = <60>;
> vsync-len = <10>;
> };
>
> - Went as far back as kernel v4.0, even to v3.12 or so (commit 493a863, "ARM:
> dts: imx51-babbage: Make DVI and WVGA panel functional"). No difference. So nothing to
> bisect, unfortunately.
Looking at the hardware user's guide [1] chapter 9 (VGA and DVI out), I
notice that the TFP410PA bridge seems to be connected to the DISP2_DAT
data lines, but uses the DISP1_H/V sync signals (which I can't believe
is right), according to figure 9-1. But the device tree pin
configuration configures the DISP1_DAT data lines with pinctrl_ipu_disp1
instead. This pin configuration was moved there from imx51.dtsi, so I
think it was just never adapted for this boards' quirks.
[1] http://www.nxp.com/assets/documents/data/en/user-guides/evk_imx51_Hardware_UG.pdf
It might also be useful to find out which GPIOs are connected to the
TFP410 power down and reset lines.
> - In dmesg this is all the output I get:
>
> [ 0.801700] imx-ipuv3 40000000.ipu: no port@0 node in /soc/ipu@40000000, not using CSI0
> [ 0.809826] imx-ipuv3 40000000.ipu: no port@1 node in /soc/ipu@40000000, not using CSI1
> [ 0.818600] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [ 0.825230] [drm] No driver support for vblank timestamp query.
> [ 0.831481] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
> [ 0.839132] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
> [ 0.846617] imx-drm display-subsystem: bound display@di0 (ops imx_pd_ops)
> [ 0.986410] Console: switching to colour frame buffer device 128x48
> [ 1.032306] imx-drm display-subsystem: fb0: frame buffer device
> [ 1.039362] [drm] Initialized imxdrm 1.0.0 20120507 for display-subsystem on minor 0
> [ 1.047276] imx-ipuv3 40000000.ipu: IPUv3EX probed
>
> As far as I know this is nothing unexpected. CSI0 and CSI1 are not connected but DI0 should be the
> DVI port, which does get initialized. The size of the framebuffer device seems to indicate the resolution
> is set correctly (assuming 16x8 characters).
>
> There was also a "timeout waiting for vsync" error,
>
> [ 0.917254] WARNING: CPU: 0 PID: 1 at drivers/gpu/drm/drm_atomic_helper.c:1122 drm_atomic_helper_wait_for_vblanks.part.0+0x264/0x274
> [ 0.917259] [CRTC:26] vblank wait timed out
>
> which was fixed after applying Philipp Zabel's "drm/imx: don't wait for vblank and stop calling cleanup_planes in commit_tail" patch series.
> However that didn't solve the output issue.
>
> I'm out of things to try to diagnose this, does anyone perhaps have an idea or seen this issue
> before?
>
> Regards,
> Wladimir van der Laan
>
regards
Philipp
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