Re: [PATCH 1/3] dma-fence: Clear fence->status during dma_fence_init()

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Hi Chris,

Thanks for your patches!

On 4 January 2017 at 20:40, Daniel Vetter <daniel@xxxxxxxx> wrote:
> On Wed, Jan 04, 2017 at 02:12:20PM +0000, Chris Wilson wrote:
>> As the fence->status is an optional field that may be set before
>> dma_fence_signal() is called to convey that the fence completed with an
>> error, we have to ensure that it is always set to zero on initialisation
>> so that the typical use (i.e. unset) always flags a successful completion.
>>
>> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
>
> Yeah, this looks all pretty. On the series:
>
> Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
>
FWIW, please feel free, for this series, to apply my

Reviewed-by: Sumit Semwal <sumit.semwal@xxxxxxxxxx>

> I'll defer to Gustavo for another pass over it and merging it to drm-misc.
> -Daniel
>

Best,
Sumit.
>> ---
>>  drivers/dma-buf/dma-fence.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
>> index 3444f293ad4a..9130f790ebf3 100644
>> --- a/drivers/dma-buf/dma-fence.c
>> +++ b/drivers/dma-buf/dma-fence.c
>> @@ -534,6 +534,7 @@ dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
>>       fence->context = context;
>>       fence->seqno = seqno;
>>       fence->flags = 0UL;
>> +     fence->status = 0;
>>
>>       trace_dma_fence_init(fence);
>>  }
>> --
>> 2.11.0
>>
>> _______________________________________________
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>> dri-devel@xxxxxxxxxxxxxxxxxxxxx
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> dri-devel mailing list
> dri-devel@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/dri-devel



-- 
Thanks and regards,

Sumit Semwal
Linaro Mobile Group - Kernel Team Lead
Linaro.org │ Open source software for ARM SoCs
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