On Fri, Oct 14, 2016 at 10:32 AM, Dan Carpenter
<dan.carpenter@xxxxxxxxxx> wrote:
> Hello Rex Zhu,
>
> The patch 599a7e9fe1b6: "drm/amd/powerplay: implement smu7 hwmgr to
> manager asics with smu ip version 7." from Sep 9, 2016, leads to the
> following static checker warning:
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:2125 smu7_patch_limits_vddc()
> warn: passing casted pointer '&tab->vddc' to 'smu7_patch_ppt_v0_with_vdd_leakage()' 16 vs 32.
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c
> 2119 static int smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr,
> 2120 struct phm_clock_and_voltage_limits *tab)
> 2121 {
> 2122 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> 2123
> 2124 if (tab) {
> 2125 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddc,
> 2126 &data->vddc_leakage);
>
> This call corrupts vddci.
>
> 2127 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddci,
> 2128 &data->vddci_leakage);
>
> But that's fine since we immediately overwrite it here. But
> unfortunately this call corrupt tab->vddgfx.
Thanks. Should be fixed in the attached patch.
Alex
>
> 2129 }
> 2130
> 2131 return 0;
> 2132 }
>
> regards,
> dan carpenter
> _______________________________________________
> dri-devel mailing list
> dri-devel@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
From 2e94250b99ceb556335a34a01ea9d36cd9ce6cec Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@xxxxxxx>
Date: Fri, 14 Oct 2016 11:11:06 -0400
Subject: [PATCH] drm/amdgpu/powerplay/smu7: fix static checker warning
Casting of voltage values to a larger size results in
overwriting adjacent memory in the structure.
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 7fba97e..11df7b2 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2133,15 +2133,18 @@ static int smu7_patch_acp_vddc(struct pp_hwmgr *hwmgr,
}
static int smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr,
- struct phm_clock_and_voltage_limits *tab)
+ struct phm_clock_and_voltage_limits *tab)
{
+ uint32_t vddc, vddci;
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
if (tab) {
- smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddc,
- &data->vddc_leakage);
- smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddci,
- &data->vddci_leakage);
+ smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc,
+ &data->vddc_leakage);
+ tab->vddc = vddc;
+ smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddci,
+ &data->vddci_leakage);
+ tab->vddci = vddci;
}
return 0;
--
2.5.5
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