tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-4.7
head: 40e923b4f9d40cf4ef12b6b11b6159813f2172b2
commit: bb9e422aaea65f70f6445f8b40af9f52fab64f15 [1526/1548] drm/amd/dal: Enable DMCU after S3
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
git checkout bb9e422aaea65f70f6445f8b40af9f52fab64f15
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../dal/dc/dce110/dce110_link_encoder.c: In function 'dce110_link_encoder_init_dmcu_backlight_settings':
>> drivers/gpu/drm/amd/amdgpu/../dal/dc/dce110/dce110_link_encoder.c:1937:3: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
uint32_t pwmSeqRefDiv;
^~~~~~~~
vim +1937 drivers/gpu/drm/amd/amdgpu/../dal/dc/dce110/dce110_link_encoder.c
1921 pwmSeqRefDiv,
1922 stored_backlight_registers.
1923 vLVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV,
1924 LVTMA_PWRSEQ_REF_DIV,
1925 BL_PWM_REF_DIV);
1926 dm_write_reg(ctx, BL_REG(LVTMA_PWRSEQ_REF_DIV),
1927 pwmSeqRefDiv);
1928 }
1929 } else {
1930 stored_backlight_registers.vBL_PWM_CNTL =
1931 dm_read_reg(ctx, BL_REG(BL_PWM_CNTL));
1932 stored_backlight_registers.vBL_PWM_CNTL2 =
1933 dm_read_reg(ctx, BL_REG(BL_PWM_CNTL2));
1934 stored_backlight_registers.vBL_PWM_PERIOD_CNTL =
1935 dm_read_reg(ctx, BL_REG(BL_PWM_PERIOD_CNTL));
1936
> 1937 uint32_t pwmSeqRefDiv;
1938
1939 pwmSeqRefDiv = dm_read_reg(ctx, BL_REG(LVTMA_PWRSEQ_REF_DIV));
1940 stored_backlight_registers.
1941 vLVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV =
1942 get_reg_field_value(pwmSeqRefDiv,
1943 LVTMA_PWRSEQ_REF_DIV, BL_PWM_REF_DIV);
1944 }
1945
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Attachment:
.config.gz
Description: application/gzip
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