Hi Javier,
2016년 05월 31일 07:58에 Javier Martinez Canillas 이(가) 쓴 글:
> Hello Inki,
>
> On 04/05/2016 04:27 AM, Inki Dae wrote:
>> This patch adds HW trigger support on i80 mode.
>>
>> Until now, Exynos DRM only supported SW trigger which was set
>> SWTRGCMD bit of TRIGCON register by CPU to transfer scanout
>> buffer to Display bus device or panel.
>>
>> With this patch, the transmission to Display bus device or
>> panel will be initiated by FIMD controller.
>>
>> Signed-off-by: Inki Dae <inki.dae@xxxxxxxxxxx>
>> ---
>
> There is a regression for the Exynos5800 Peach Pi Chromebook display due
> this patch. The display is blank and I noticed that it only happens when
> HW start trigger is enabled, but works with SW trigger (as it was before).
>
> So for example with the following diff on top of v4.7-rc1, display works
> again. Do you have any hints about what could be the issue?
Right, there is a regression on boards with i80 Panel and in case that bootloader set trigger mode to SW trigger. The current trigger mode should be changed to other one after entering into PSR mode of Panel device according to HW guy's saying. If the panel doesn't support the PSR mode, then the mode should be changed after Panel power off and on again. I don't understand exactly what is the PSR mode so I need more details about PSR mode.
I will fix it soon.
Thanks,
Inki Dae
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 0444d7fc400d..8c62830e9514 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -171,7 +171,7 @@ static struct fimd_driver_data exynos5420_fimd_driver_data = {
> .lcdblk_vt_shift = 24,
> .lcdblk_bypass_shift = 15,
> .lcdblk_mic_bypass_shift = 11,
> - .trg_type = I80_HW_TRG,
> .has_shadowcon = 1,
> .has_vidoutcon = 1,
> .has_vtsel = 1,
>
> Best regards,
>
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