On Sat, Mar 26, 2016 at 01:18:38PM +0000, Paul Parsons wrote:
> The EDID 1.4 specification section 3.10.3.9 defines an Established Timings III
> descriptor (tag #F7h). The parsing of this descriptor by drm_est3_modes() is
> off by one byte: the offset of the first timing bitmap is 6, not 5.
>
> Signed-off-by: Paul Parsons <lost.distance@xxxxxxxxx>
> ---
>
> diff -ru a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> --- a/drivers/gpu/drm/drm_edid.c 2016-03-14 04:28:54.000000000 +0000
> +++ b/drivers/gpu/drm/drm_edid.c 2016-03-26 12:04:58.963352156 +0000
> @@ -2215,7 +2215,7 @@
> {
> int i, j, m, modes = 0;
> struct drm_display_mode *mode;
> - u8 *est = ((u8 *)timing) + 5;
> + u8 *est = ((u8 *)timing) + 6;
Hmm. The code is very hard to follow due to the weird structs and
whatnot. But yeah this looks correct.
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Oh and I suppose you could also fix up the EDID version check
to check for 1.4+ before even considering the est3 descriptor
as valid.
>
> for (i = 0; i < 6; i++) {
> for (j = 7; j >= 0; j--) {
>
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel OTC
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel
