> -----Original Message----- > From: Marek Vasut <marex@xxxxxxx> > Sent: Wednesday, November 6, 2024 5:12 PM > To: Pandey, Radhey Shyam <radhey.shyam.pandey@xxxxxxx>; > dmaengine@xxxxxxxxxxxxxxx > Cc: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxx>; Simek, Michal > <michal.simek@xxxxxxx>; Peter Korsgaard <peter@xxxxxxxxxxxxx>; Vinod Koul > <vkoul@xxxxxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Katakam, Harini > <harini.katakam@xxxxxxx> > Subject: Re: [PATCH] dmaengine: xilinx_dma: Fix freeup active list based on > descriptor completion bit > > On 11/6/24 10:48 AM, Pandey, Radhey Shyam wrote: > >> -----Original Message----- > >> From: Marek Vasut <marex@xxxxxxx> > >> Sent: Thursday, October 31, 2024 10:28 PM > >> To: dmaengine@xxxxxxxxxxxxxxx > >> Cc: Marek Vasut <marex@xxxxxxx>; Uwe Kleine-König <u.kleine- > >> koenig@xxxxxxxxxxxx>; Simek, Michal <michal.simek@xxxxxxx>; Peter > >> Korsgaard <peter@xxxxxxxxxxxxx>; Pandey, Radhey Shyam > >> <radhey.shyam.pandey@xxxxxxx>; Vinod Koul <vkoul@xxxxxxxxxx>; > >> linux-arm- kernel@xxxxxxxxxxxxxxxxxxx > >> Subject: [PATCH] dmaengine: xilinx_dma: Fix freeup active list based > >> on descriptor completion bit > >> > >> The xilinx_dma is completely broken since the referenced commit, > >> because if the (seg->hw.status & XILINX_DMA_BD_COMP_MASK) is not set > >> for whatever reason, the current descriptor is never moved to > > > > I want to understand more on this failure scenario. How to replicate it? > > The very basic test is to use AXI DMA for DMA transfer, which fails to complete > because of this new chunk of code. By reading the commit history, I can only > conclude this was something that got added due to the irq_delay, but was never > tested on core without irq_delay support ? This commit is also present in downstream xilinx kernel and all legacy regression are working fine without xlnx,irq-delay. Added Abin to this thread who confirmed that axidmatest client[1] works without IRQ delay. [1]: https://github.com/Xilinx/linux-xlnx/blob/master/drivers/dma/xilinx/axidmatest.c So I want to understand what is the test client you are using? > > > Why is completion bit not set ? Based on the documentation completed > > bit indicates to the software that the DMA Engine has completed the > > transfer as described by the associated descriptor. The DMA Engine > > sets this bit to 1 when the transfer is completed. > I don't know, the bit was not used before you added the bit and check of the bit in the > problematic commit 7bcdaa658102 ("dmaengine: xilinx_dma: > Freeup active list based on descriptor completion bit")
