Verified this patch series with our device (sg interface) Thanks, Lizhi On 12/18/23 03:39, Jan Kuliga wrote:
Hi, This patchset introduces a couple of xdma driver enhancements. The most important change is the introduction of interleaved DMA transfers feature, which is a big deal, as it allows DMAEngine clients to express DMA transfers in an arbitrary way. This is extremely useful in FPGA environments, where in one FPGA system there may be a need to do DMA both to/from FIFO at a fixed address and to/from a (non)contiguous RAM. It is a another reroll of my previous patch series [1], but it is heavily modified one as it is based on Miquel's patchset [2]. We agreed on doing it that way, as both our patchsets touched the very same piece of code. The discussion took place under [2] thread. I tested it with XDMA v4.1 (Rev.20) IP core, with both sg and interleaved DMA transfers. Jan Changes since v1: [PATCH 1/5]: Complete a terminated descriptor with dma_cookie_complete() Don't reinitialize temporary list head in xdma_terminate_all() [PATCH 4/5]: Fix incorrect text wrapping Changes since v2: [PATCH 1/5]: DO NOT schedule callback from within xdma_terminate_all() Changes since v3: Base patchset on Miquel's [2] series Reorganize commits` structure Introduce interleaved DMA transfers feature Implement transfer error reporting Changes since v4: Get rid of duplicated line of code Fix various coding style issues [1]: https://lore.kernel.org/dmaengine/20231124192524.134989-1-jankul@xxxxxxxxxxxxxxxx/T/#t [2]: https://lore.kernel.org/dmaengine/20231130111315.729430-1-miquel.raynal@xxxxxxxxxxx/T/#t --- Jan Kuliga (8): dmaengine: xilinx: xdma: Get rid of unused code dmaengine: xilinx: xdma: Add necessary macro definitions dmaengine: xilinx: xdma: Ease dma_pool alignment requirements dmaengine: xilinx: xdma: Rework xdma_terminate_all() dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr() dmaengine: xilinx: xdma: Add transfer error reporting dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers dmaengine: xilinx: xdma: Implement interleaved DMA transfers drivers/dma/xilinx/xdma-regs.h | 30 ++-- drivers/dma/xilinx/xdma.c | 283 +++++++++++++++++++++++---------- 2 files changed, 210 insertions(+), 103 deletions(-)
